Veritutor is a basic computer which is implemented using Verilog and which implements RV32I (base integer instruction set of the RISC-V ISA)
Done purely for educational and recreational purposes
- basic 5 stage spu pipeline with fetch, decode, execute, memore, write stages
- all types of RV32I instructions are handled
- some basic immediate assembly in cocotb python test benches
- the ultimate goal is to compile some C code to rv32i target and run the executable using this verilog implementation
- transform simplicity of rv32i to gpu architecture and create something like tiny-gpu + rv32i