A professional hardware-software co-design project featuring a 6-state Moore Finite State Machine (FSM) implemented in SystemVerilog. This system integrates a C-based Analytics Engine via the Direct Programming Interface (DPI-C) to dynamically adjust traffic timings based on real-time data from external configuration files.
The controller is designed as a Moore Machine, where the traffic light outputs are determined strictly by the current state. The FSM manages three distinct road components: the Main Road (M1/M2), the Protected Main Turn (MT), and the Side Street (S).
The following table describes the standard traffic cycle when the system is operating under baseline conditions.
| State | Phase Description | Light Status (M1, M2, MT, S) | Duration (Clock Cycles) |
|---|---|---|---|
| S0 | Main Road Straight | M1: GREEN, M2: GREEN, Others: RED | 7 (Standard) |
| S1 | Main Transition | M1: YELLOW, M2: YELLOW, Others: RED | 2 |
| S2 | Main Protected Turn | MT: GREEN, Others: RED | 5 |
| S3 | Turn Transition | MT: YELLOW, Others: RED | 2 |
| S4 | Side Street Flow | S: GREEN, Others: RED | 5 |
| S5 | Side Transition | S: YELLOW, Others: RED | 2 |
The "Smart" aspect of this controller is handled by an integrated C-function that monitors simulation time via a "backdoor" link.
- External Input: A separate
input.txtfile defines the start and end times (e.g.,20 150). - Software Processing: The C-logger reads these values and compares them against the current simulation time (
$time). - Hardware Reaction: If the time falls within the window, a
is_rush_hourbit is passed back to the FSM, extending the S0 (Main Green) duration by 300% (from 7 cycles to 21 cycles).
The system was verified using a 20ns reset offset to ensure the hardware initializes correctly before software-driven parameters are applied.
- Setup:
input.txtset to a window outside the simulation run (e.g.,500 600). - Observation: The system successfully cycled through all 6 states with base timings.
MTandSlights functioned correctly in their respective phases.
- Setup:
input.txtset to20 150. - Observation: After the initial 20ns reset period, the next occurrence of S0 (Main Green) was observed to be exactly 3x longer in both the waveform and the generated log, confirming the DPI-C bridge is functioning correctly.
- Observation: Verified via waveform that
light_MTonly transitions to Green when M1, M2, and S are explicitly Red, preventing simulated collisions.
- Upload
design.sv,testbench.sv,logger.c, andinput.txtto EDA Playground. - Select Siemens Questa or Mentor Questa as the simulator.
- Ensure the DPI-C compilation option is active.
- Run the simulation.
- Check the Console Output for real-time logs and open
traffic_results.txtfor the final analytics report.
design.sv: The 6-state Moore FSM and output logic.testbench.sv: Stimulus generation and DPI-C function calls.logger.c: C-code for file I/O and simulation analytics.input.txt: Configuration file for user-defined Rush Hour windows.