Support generic-timer (and EL2) on Armv7-A#141
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Requires we change the emulated CPU from Cortex-A8 to Cortex-A15, as Cortex-A8 doesn't have the timer extensions. That in turn meant we booted into EL2, so we needed to bounce ourselves into EL1 that the examples were expecting. And that meant making a bunch of Hyp registers available on Armv7-A and Armv8-R, and changing the Armv7-A start-up routine to be the Armv8-R routine.
jonathanpallant
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rebased on main |
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| pub mod cache; | ||
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| #[cfg(any(test, doc, arm_architecture = "v8-r", arm_architecture = "v7-a"))] |
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Can we make this one the same order as the others above, with the lower number architecture first?
| use aarch32_cpu::register::{cpsr::ProcessorMode, Cpsr}; | ||
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| #[cfg(arm_architecture = "v8-r")] | ||
| #[cfg(any(arm_architecture = "v8-r", arm_architecture = "v7-a"))] |
| #[cfg(all(target_arch = "arm", not(arm_architecture = "v8-r")))] | ||
| #[cfg(all( | ||
| target_arch = "arm", | ||
| not(any(arm_architecture = "v8-r", arm_architecture = "v7-a")) |
| // | ||
| // We boot into EL2, set up a stack pointer, and run `kmain` in EL1. | ||
| #[cfg(arm_architecture = "v8-r")] | ||
| #[cfg(any(arm_architecture = "v8-r", arm_architecture = "v7-a"))] |
You mean the switch from Cortex-A8 to Cortex-A15? I don't think the matters - they will use the same emulation engine underneath. I only switched because the A15 has some extra features enabled that we needed. |
SGTM |
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Other than my comments about cfg expr ordering, LGTM. |
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Fixes #140 by adding generic timer support for Armv7-A.
registers::armv8rmodule and into a newregisters::hypmodule available on Armv7-A and Armv8-R