A mini FPGA synthesizer built for the Nexys Video Artix-7 FPGA from Digilent. Contains 4 oscillators (sine, square, sawtooth, triangle), an envelope generator, an amplitude modulator, and a top module that accepts encoder inputs from the attack and delay parameters of the envelope, as well as a keypad input that controls the frequency of the output signal.
- Most installations of Vivado will not contain the Nexys Video Board.
- In the board configuration page in project setup, click Refresh, then wait a couple minutes for Vivado to pull all board files. T
- Search for "Nexys Video", and click the Download button to retrieve the board files.
If you want to test this project on your own Nexys Video board you can do so easily by making use of the provided TCL script in a few short steps.\
- Clone the repo
- Navigate to the
synth/vivado_nexysVideo/builddirectory - In the terminal, run
vivado -mode batch -source ../vivado.tcl
The TCL script will then open a new Vivado project, add all relevant files, and run everything from synthesis to generating the bitstream and will automatically program the connected board. The provided RTL is configured to have the PMOD keyboard in the JA PMOD slot and encoders in the JB and JC PMOD connectors, but this can be easily changed in the constraint file if needed.
To run the testbench, run make sim in the repository root. This will generate a dump.fst waveform and a out.wav WAVE audio file from top_tb.sv.
- Upload bitstreams with OpenFPGALoader
openFPGALoader -b nexysVideo bitstream.bit
- Tiny Synth (VHDL): https://github.com/gundy/tiny-synth
- FPGA Wave Generator: https://github.com/kiran2s/FPGA-Synthesizer
- MichD FPGA MIDI Synth: https://michd.me/blog/yearproject-fpga-midi-synth/
- .wav testbench
- Reading .wav using DPI-C: https://www.rtlaudiolab.com/009-reading-wave-files-in-systemverilog/
- Wave format specifics: http://soundfile.sapp.org/doc/WaveFormat/