2U Feeders

[sphawes]

This is a long-running PR for adding 2U feeder support (wider feeders that take up two slots or "U", supporting 16mm and 24mm tape).

[sphawes]

@theacodes would love your eyes on the schematic for the 2u mobo! I'll poke review-squad about this afterwards.

[sphawes]

Notes on what's changed:

• Switched to the TPS54560 Buck converter for our 24v -> 10v conversion (the same one that's on the lumen mobo) instead of the old one that folks had a hard time sourcing, and was apparently pretty old technology. i suspect this chip is crazy overkill.
• Switched to the AP2210 LDO for our 10v -> 3v3 conversion. Much smaller than the old AZ1117 we used to use, and quite a bit less current, but 600ma should be plenty for our 3v3 rail.
• Switched to STM32F030C8T6 uC. now with 64k flash!
• Cleaned up a TON in the schematic, made custom symbols for many things.

I also redid the layout in the new form factor, but im not concerned about that right now. im waiting on some parts in the mail to confirm a few things about the board dimensions and such!

[theacodes]

High-level feedback:

• The AP2210 is going to be screaming hot. Its smaller package means it much, much worse at getting rid of heat. We can draw at most 100mA before it goes into thermal shutdown at 150C, and at that point the poor thing will wasting 700mW as heat. Typical current consumption for this device seems to be somewhere around 50mA based on rough calculation, which means it'll heat up 72C while wasting 300mW - Multiply this by 50 feeders and we're easily wasting nearly 25W keeping the room warm. The RS485 transceiver makes things even more difficult, as it can draw up to 250mA in certain situations. If sustained for more than a few milliseconds, that would flash-fry our poor little LDO like it's nothing. My recommendation is that we either replace the LDO with 3.3V switching regulator or put a 5V switching regulator upstream of the LDO. You could also consider a single, dual-output switching regulator to provide the 10V and 3.3V outputs.
• There's no protection circuitry on VDC, not even transient protection. Adding and removing capacitive loads with our inductive cables will cause voltage spikes. The TPS54560 should have enough margin to tank them, but it wouldn't kill us to have a TVS diode as a backup. Ideally, we would have an hot plug switch or discrete time-delayed PMOS power switch.
• VDC likely needs more bulk capacitance since the power supply is distant from each feeder. Inrush current might become an issue, but I think we have that handled on the motherboard?
• The TPS54560 schematic doesn't list any rationale for how the supporting passives were calculated. This rationale can be included in the schematic or in a separate file linked from the schematic. At minimum, I would want to see both rationale and calculations for:
  • Switching frequency and Rt (datasheet section 8.2.2.2)
  • Output inductor Lo (8.2.2.3)
  • Output capacitors Cout, including Resr and derating (8.2.2.4)
  • Catch diode, including its power dissipation (8.2.2.5)
  • Input capacitors, including derating and input ripple voltage and current (8.2.2.6)
  • Undervoltage lockout setpoints Vstart and Vstop (8.2.2.8)
  • Feedback resistors, including the feedback network voltage (which must be above 1uA) (8.2.2.9)
  • Compensation network (8.2.2.11)
  • Estimated power dissipation (8.2.2.13)
• The two SWD headers is a bit much. I'd consider either (a) reducing this to one for debugging and replacing the other with a three-pin pogo connector for automated programming, (b) reducing it to just a three-pin pogo connector for debugging, or (c) using something like tag connect, SKEDD, or SOICBite.
• Be consistent in how you format component values, there's a few mix-and-matched styles throughout. I'd recommend sticking with RKM throughout.
• Consider tying one of the unused MCU pins to ground so we can programmatically check if we're running on this board or one of the previous ones.

ERC issues:

• U3 has several unconnected pins. Place no connect symbols on unused pins.
• Power nets (3V3, 10V, VDC, and GND) are not driven which is causing ERC errors. Use the power flag symbols on these nets near the spring connector to mark them as driven.
• Many symbols are outdated. Update them using the update symbol tool.
• There are a significant amount of warnings, I'm happy to go through these together. Most are relatively easy to fix. I'd prefer us to have zero warnings and zero ignored tests. We can exclude specific violations with comments.

Missing information:

• Ratings:
  • All passives should have a Rating field. This field should be visible, though it can be displayed at a smaller size.
  • All capacitors need voltage, tolerance, and dielectric ratings, for example, 25V/10%/X7R.
  • All resistors need wattage, tolerance, and (optionally) composition ratings, for example 100mW/5% or 100mW/5%/thin.
  • All inductors need DC resistance, current, and tolerance ratings, for example R50/7A/30%.
  • All signal, power, and schottky diodes need forward voltage and rated current ratings, for example 30V/500mA.
  • All TVS diodes need reverse standoff voltage and peak pulse ratings, for example 30V/8A.
  • All zener diodes need zener voltage and power rating, for example 10V/500mW.
  • All crystals should have load capacitance and tolerance ratings, for example 10p/30pmm
• Datasheets
  • SKTDLDE010 datasheet
  • B560C datasheet
  • Y1 part number & datasheet

Stylistic feedback:

• Consider using US letter page size, since it makes it easier to physically print and review.
• Consider filling out the page properties with the designer name (Comment 1), license (Comment 2), and project URL (Comment 3).
• Consider splitting out sections into subsheets. Especially if you take some of my further advice.
• Consider using the KiCAD standard library symbols for RGB LEDs and buttons/switches.
• Consider using the US-style symbols for resistors.
• Consider using the Connector_Generic footprints, or at least updating the old _Female connectors to _Socket connectors.
• Consider auto-placing symbol fields, especially if you add and display the rating field.
• Be consistent about placing power and ground symbols in the preferred orientation (power up, ground down).
• Consider hiding the GND text on the ground symbol, it's redundant.
• Try to avoid unnecessarily using global labels, since it obscures signal flow. Motor control and communication are especially egregious.
• For chips with a low number of bypass caps, prefer to keep them in-line with the connection from power symbol to power pin. For chips that have too many to make that practical, note which pins the caps need to be near. Sometime a hybrid approach is best, for example, I'd place C11 inline and keep C3-C5, C7-C8, C10 as separate with notes on which pins need them.
• Try to consistently place inputs on the left and outputs on the right. Especially if using sub-sheets and hierarchal labels.
• This one is very controversial but, you could remove the fiducials from the schematic. You can add them in the PCB and mark them as "Not In Schematic".

[theacodes]

Additional comments:

• Reserve pins PC13, PC14, and PC15 for strapping pins. Tie PC13 to ground for this board revision, leave PC14 and PC15 floating.
• Add an unpopulated STEMMA QT / Qwiic connector with the I2C lines going to one of the spare I2C pins on the MCU:

SCL	SDA
PB13	PB14
PB10	PB11
PB8	PB9