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1. uvm-tb-sipo-reg uvm-tb-sipo-reg Public

   UVM testbench bring-up for a simple SIPO register and hence master UVM style verification for any digital design verification needs

   SystemVerilog

2. apb-memory apb-memory Public

   Developed a generic memory module and implemented a protocol-compliant wrapper to interface with the AMBA APB standard. Conducted thorough verification using class-based methodologies in SystemVerilog

   SystemVerilog

3. cerx-ml cerx-ml Public

   cost-effective-rocketry-experiments-with-machine-learning --powered-by-oneAPI

   Jupyter Notebook 1

4. Minimalistic-ALU Minimalistic-ALU Public

   Minimalistic Arithmetic and Logic Unit (ALU) built using 74-series TTL ICs and controlled via an Arduino interface

   C++

5. PicoRV-SoC-Tang-Nano-9k PicoRV-SoC-Tang-Nano-9k Public

   Using the Gowin GW1NR-9 FPGA to prototype a simple RISC-V SOC with SRAM, LED driver, countdown timer and UART controller for education purposes with Gowin EDA tools and Verilog

   Verilog 2

6. Flake-weather-API Flake-weather-API Public

   4th semester project - Flake weather service - weather API

   C#