Self made 32 bit CPU.
The CPU instruction set is a subset of MIPS CPU.
- Make MIPS core which can run MIPS binary compiled by GCC.
- Multi-cycle (not include pipeline)
Single-cycle MIPS subset implementation is here.
kamaboko123/verilog-training/mips
| Name | Name | Last commit date | ||
|---|---|---|---|---|
Self made 32 bit CPU.
The CPU instruction set is a subset of MIPS CPU.
Single-cycle MIPS subset implementation is here.
kamaboko123/verilog-training/mips