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[SYCL] Refactor sycl-post-link saveModule to improve code structure #21674

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dc145e2
[SYCL] Refactor sycl-post-link saveModule to improve code structure
maksimsab Apr 1, 2026
10ba9a4
resolve mistake
maksimsab Apr 1, 2026
7a79d77
fix sycl/test/ failing tests
maksimsab Apr 1, 2026
b9c093f
address comments
maksimsab Apr 7, 2026
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4 changes: 2 additions & 2 deletions llvm/test/tools/sycl-post-link/aot-esimd.ll
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Expand Up @@ -9,9 +9,9 @@
; RUN: -o intel_gpu_dg1,%t-dg1.table

; RUN: FileCheck %s -input-file=%t-dg1.table -check-prefix=CHECK-TABLE
; RUN: FileCheck %s -input-file=%t-dg1_esimd_0.sym -check-prefix=CHECK-SYM -implicit-check-not=reqd_sub_group_size_kernel_1
; RUN: FileCheck %s -input-file=%t-dg1_0.esimd.sym -check-prefix=CHECK-SYM -implicit-check-not=reqd_sub_group_size_kernel_1

; CHECK-TABLE: _esimd_0.sym
; CHECK-TABLE: _0.esimd.sym
; CHECK-SYM: esimd_kernel

target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
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70 changes: 35 additions & 35 deletions llvm/test/tools/sycl-post-link/multiple-filtered-outputs.ll
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Expand Up @@ -44,59 +44,59 @@
; CHECK-ALL-NEXT: _5.sym
; CHECK-ALL-EMPTY:

; PVC does not support sg8 (=1) or sg64 (=2)
; CHECK-PVC: _intel_gpu_pvc_0.prop|{{.*}}_0.sym
; CHECK-PVC-NEXT: _intel_gpu_pvc_3.prop|{{.*}}_3.sym
; CHECK-PVC-NEXT: _intel_gpu_pvc_4.prop|{{.*}}_4.sym
; CHECK-PVC-NEXT: _intel_gpu_pvc_5.prop|{{.*}}_5.sym
; PVC does not support sg8 (=1) or sg64 (=2)
; CHECK-PVC: _0.intel_gpu_pvc.prop|{{.*}}_0.sym
; CHECK-PVC-NEXT: _3.intel_gpu_pvc.prop|{{.*}}_3.sym
; CHECK-PVC-NEXT: _4.intel_gpu_pvc.prop|{{.*}}_4.sym
; CHECK-PVC-NEXT: _5.intel_gpu_pvc.prop|{{.*}}_5.sym
; CHECK-PVC-EMPTY:

; RUN: FileCheck %s -input-file=%t_intel_gpu_pvc_0.prop -check-prefix=CHECK-PVC-PROP
; RUN: FileCheck %s -input-file=%t_intel_gpu_pvc_3.prop -check-prefix=CHECK-PVC-PROP
; RUN: FileCheck %s -input-file=%t_intel_gpu_pvc_4.prop -check-prefix=CHECK-PVC-PROP
; RUN: FileCheck %s -input-file=%t_intel_gpu_pvc_5.prop -check-prefix=CHECK-PVC-PROP
; RUN: FileCheck %s -input-file=%t_0.intel_gpu_pvc.prop -check-prefix=CHECK-PVC-PROP
; RUN: FileCheck %s -input-file=%t_3.intel_gpu_pvc.prop -check-prefix=CHECK-PVC-PROP
; RUN: FileCheck %s -input-file=%t_4.intel_gpu_pvc.prop -check-prefix=CHECK-PVC-PROP
; RUN: FileCheck %s -input-file=%t_5.intel_gpu_pvc.prop -check-prefix=CHECK-PVC-PROP
; CHECK-PVC-PROP: compile_target=2|oBAAAAAAAAQauRXZs91ZwV3XwZ3Y

; TGLLP does not support fp64 (=0) or sg64 (=2)
; CHECK-TGLLP: _intel_gpu_tgllp_1.prop|{{.*}}_1.sym
; CHECK-TGLLP-NEXT: _intel_gpu_tgllp_3.prop|{{.*}}_3.sym
; CHECK-TGLLP-NEXT: _intel_gpu_tgllp_4.prop|{{.*}}_4.sym
; CHECK-TGLLP-NEXT: _intel_gpu_tgllp_5.prop|{{.*}}_5.sym
; CHECK-TGLLP: _1.intel_gpu_tgllp.prop|{{.*}}_1.sym
; CHECK-TGLLP-NEXT: _3.intel_gpu_tgllp.prop|{{.*}}_3.sym
; CHECK-TGLLP-NEXT: _4.intel_gpu_tgllp.prop|{{.*}}_4.sym
; CHECK-TGLLP-NEXT: _5.intel_gpu_tgllp.prop|{{.*}}_5.sym
; CHECK-TGLLP-EMPTY:

; RUN: FileCheck %s -input-file=%t_intel_gpu_tgllp_1.prop -check-prefix=CHECK-TGLLP-PROP
; RUN: FileCheck %s -input-file=%t_intel_gpu_tgllp_3.prop -check-prefix=CHECK-TGLLP-PROP
; RUN: FileCheck %s -input-file=%t_intel_gpu_tgllp_4.prop -check-prefix=CHECK-TGLLP-PROP
; RUN: FileCheck %s -input-file=%t_intel_gpu_tgllp_5.prop -check-prefix=CHECK-TGLLP-PROP
; RUN: FileCheck %s -input-file=%t_1.intel_gpu_tgllp.prop -check-prefix=CHECK-TGLLP-PROP
; RUN: FileCheck %s -input-file=%t_3.intel_gpu_tgllp.prop -check-prefix=CHECK-TGLLP-PROP
; RUN: FileCheck %s -input-file=%t_4.intel_gpu_tgllp.prop -check-prefix=CHECK-TGLLP-PROP
; RUN: FileCheck %s -input-file=%t_5.intel_gpu_tgllp.prop -check-prefix=CHECK-TGLLP-PROP
; CHECK-TGLLP-PROP: compile_target=2|4BAAAAAAAAQauRXZs91ZwV3X0dGbsBH

; CFL does not support sg64 (=2)
; CHECK-CFL: _intel_gpu_cfl_0.prop|{{.*}}_0.sym
; CHECK-CFL-NEXT: _intel_gpu_cfl_1.prop|{{.*}}_1.sym
; CHECK-CFL-NEXT: _intel_gpu_cfl_3.prop|{{.*}}_3.sym
; CHECK-CFL-NEXT: _intel_gpu_cfl_4.prop|{{.*}}_4.sym
; CHECK-CFL-NEXT: _intel_gpu_cfl_5.prop|{{.*}}_5.sym
; CHECK-CFL: _0.intel_gpu_cfl.prop|{{.*}}_0.sym
; CHECK-CFL-NEXT: _1.intel_gpu_cfl.prop|{{.*}}_1.sym
; CHECK-CFL-NEXT: _3.intel_gpu_cfl.prop|{{.*}}_3.sym
; CHECK-CFL-NEXT: _4.intel_gpu_cfl.prop|{{.*}}_4.sym
; CHECK-CFL-NEXT: _5.intel_gpu_cfl.prop|{{.*}}_5.sym
; CHECK-CFL-EMPTY:

; RUN: FileCheck %s -input-file=%t_intel_gpu_cfl_0.prop -check-prefix=CHECK-CFL-PROP
; RUN: FileCheck %s -input-file=%t_intel_gpu_cfl_1.prop -check-prefix=CHECK-CFL-PROP
; RUN: FileCheck %s -input-file=%t_intel_gpu_cfl_3.prop -check-prefix=CHECK-CFL-PROP
; RUN: FileCheck %s -input-file=%t_intel_gpu_cfl_4.prop -check-prefix=CHECK-CFL-PROP
; RUN: FileCheck %s -input-file=%t_intel_gpu_cfl_5.prop -check-prefix=CHECK-CFL-PROP
; RUN: FileCheck %s -input-file=%t_0.intel_gpu_cfl.prop -check-prefix=CHECK-CFL-PROP
; RUN: FileCheck %s -input-file=%t_1.intel_gpu_cfl.prop -check-prefix=CHECK-CFL-PROP
; RUN: FileCheck %s -input-file=%t_3.intel_gpu_cfl.prop -check-prefix=CHECK-CFL-PROP
; RUN: FileCheck %s -input-file=%t_4.intel_gpu_cfl.prop -check-prefix=CHECK-CFL-PROP
; RUN: FileCheck %s -input-file=%t_5.intel_gpu_cfl.prop -check-prefix=CHECK-CFL-PROP
; CHECK-CFL-PROP: compile_target=2|oBAAAAAAAAQauRXZs91ZwV3XjZGb

; LNL does not support sg8 (=1) or sg64 (=2)
; CHECK-LNL: _intel_gpu_lnl_m_0.prop|{{.*}}_0.sym
; CHECK-LNL-NEXT: _intel_gpu_lnl_m_3.prop|{{.*}}_3.sym
; CHECK-LNL-NEXT: _intel_gpu_lnl_m_4.prop|{{.*}}_4.sym
; CHECK-LNL-NEXT: _intel_gpu_lnl_m_5.prop|{{.*}}_5.sym
; CHECK-LNL: _0.intel_gpu_lnl_m.prop|{{.*}}_0.sym
; CHECK-LNL-NEXT: _3.intel_gpu_lnl_m.prop|{{.*}}_3.sym
; CHECK-LNL-NEXT: _4.intel_gpu_lnl_m.prop|{{.*}}_4.sym
; CHECK-LNL-NEXT: _5.intel_gpu_lnl_m.prop|{{.*}}_5.sym
; CHECK-LNL-EMPTY:

; BMG does not support sg8 (=1) or sg64 (=2)
; CHECK-BMG: _intel_gpu_bmg_g21_0.prop|{{.*}}_0.sym
; CHECK-BMG-NEXT: _intel_gpu_bmg_g21_3.prop|{{.*}}_3.sym
; CHECK-BMG-NEXT: _intel_gpu_bmg_g21_4.prop|{{.*}}_4.sym
; CHECK-BMG-NEXT: _intel_gpu_bmg_g21_5.prop|{{.*}}_5.sym
; CHECK-BMG: _0.intel_gpu_bmg_g21.prop|{{.*}}_0.sym
; CHECK-BMG-NEXT: _3.intel_gpu_bmg_g21.prop|{{.*}}_3.sym
; CHECK-BMG-NEXT: _4.intel_gpu_bmg_g21.prop|{{.*}}_4.sym
; CHECK-BMG-NEXT: _5.intel_gpu_bmg_g21.prop|{{.*}}_5.sym
; CHECK-BMG-EMPTY:

target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
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6 changes: 3 additions & 3 deletions llvm/test/tools/sycl-post-link/spec-constants/default-value/esimd.ll
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Expand Up @@ -3,12 +3,12 @@
; RUN: sycl-post-link -properties -split=auto -split-esimd -lower-esimd -O2 -spec-const=native -o %t.table %s -generate-device-image-default-spec-consts
; RUN: FileCheck %s -input-file=%t.table -check-prefix=CHECK-TABLE
; RUN: FileCheck %s -input-file=%t_1.prop -check-prefix=CHECK-PROP
; RUN: FileCheck %s -input-file=%t_esimd_1.prop -check-prefix=CHECK-ESIMD-PROP
; RUN: FileCheck %s -input-file=%t_1.esimd.prop -check-prefix=CHECK-ESIMD-PROP
; RUN: %if asserts %{ sycl-post-link -properties -debug-only=SpecConst -split=auto -split-esimd -lower-esimd -O2 -spec-const=native %s -generate-device-image-default-spec-consts 2>&1 | FileCheck %s --check-prefix=CHECK-LOG %}

; CHECK-TABLE: {{.*}}_esimd_0.bc|{{.*}}_esimd_0.prop
; CHECK-TABLE: {{.*}}_0.esimd.bc|{{.*}}_0.esimd.prop
; CHECK-TABLE: {{.*}}_0.bc|{{.*}}_0.prop
; CHECK-TABLE: {{.*}}_esimd_1.bc|{{.*}}_esimd_1.prop
; CHECK-TABLE: {{.*}}_1.esimd.bc|{{.*}}_1.esimd.prop
; CHECK-TABLE: {{.*}}_1.bc|{{.*}}_1.prop

; CHECK-PROP: specConstsReplacedWithDefault=1|1
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2 changes: 1 addition & 1 deletion llvm/test/tools/sycl-post-link/sycl-esimd/assert.ll
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@@ -1,5 +1,5 @@
; RUN: sycl-post-link -properties -split-esimd -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t_esimd_0.prop
; RUN: FileCheck %s -input-file=%t_0.esimd.prop

; Verify we mark a image with an ESIMD kernel with the isEsimdImage property

Expand Down
8 changes: 4 additions & 4 deletions llvm/test/tools/sycl-post-link/sycl-esimd/basic-esimd-lower.ll
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Expand Up @@ -4,19 +4,19 @@

; No lowering
; RUN: sycl-post-link -properties -split-esimd -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t_esimd_0.ll --check-prefixes CHECK-NO-LOWERING
; RUN: FileCheck %s -input-file=%t_0.esimd.ll --check-prefixes CHECK-NO-LOWERING

; Default lowering
; RUN: sycl-post-link -properties -split-esimd -lower-esimd -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t_esimd_0.ll --check-prefixes CHECK-O2
; RUN: FileCheck %s -input-file=%t_0.esimd.ll --check-prefixes CHECK-O2

; -O2 lowering
; RUN: sycl-post-link -properties -split-esimd -lower-esimd -O2 -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t_esimd_0.ll --check-prefixes CHECK-O2
; RUN: FileCheck %s -input-file=%t_0.esimd.ll --check-prefixes CHECK-O2

; -O0 lowering, requires `-force-disable-esimd-opt` to disable all optimizations.
; RUN: sycl-post-link -properties -split-esimd -lower-esimd -O0 -force-disable-esimd-opt -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t_esimd_0.ll --check-prefixes CHECK-O0
; RUN: FileCheck %s -input-file=%t_0.esimd.ll --check-prefixes CHECK-O0

target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
target triple = "spir64-unknown-linux"
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6 changes: 3 additions & 3 deletions llvm/test/tools/sycl-post-link/sycl-esimd/basic-sycl-esimd-split.ll
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@@ -1,9 +1,9 @@
; RUN: sycl-post-link -properties -split-esimd -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t.table
; RUN: FileCheck %s -input-file=%t_0.ll --check-prefixes CHECK-SYCL-IR
; RUN: FileCheck %s -input-file=%t_esimd_0.ll --check-prefixes CHECK-ESIMD-IR
; RUN: FileCheck %s -input-file=%t_0.esimd.ll --check-prefixes CHECK-ESIMD-IR
; RUN: FileCheck %s -input-file=%t_0.prop --check-prefixes CHECK-SYCL-PROP
; RUN: FileCheck %s -input-file=%t_esimd_0.prop --check-prefixes CHECK-ESIMD-PROP
; RUN: FileCheck %s -input-file=%t_0.esimd.prop --check-prefixes CHECK-ESIMD-PROP

; This is basic test of splitting SYCL and ESIMD kernels into separate modules.
; ESIMD module should have isEsimdImage=1 property set after splitting.
Expand Down Expand Up @@ -38,7 +38,7 @@ attributes #0 = { "sycl-module-id"="a.cpp" }

; CHECK: [Code|Properties]
; CHECK-DAG: {{.*}}tmp_0.ll|{{.*}}_0.prop
; CHECK-DAG: {{.*}}tmp_esimd_0.ll|{{.*}}_esimd_0.prop
; CHECK-DAG: {{.*}}tmp_0.esimd.ll|{{.*}}_0.esimd.prop

; CHECK-SYCL-IR-DAG: define dso_local spir_kernel void @SYCL_kernel()
; CHECK-SYCL-IR-DAG: declare dso_local spir_func i64 @_Z28__spirv_GlobalInvocationId_xv()
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2 changes: 1 addition & 1 deletion llvm/test/tools/sycl-post-link/sycl-esimd/nbarriers-metadata.ll
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@@ -1,5 +1,5 @@
; RUN: sycl-post-link -properties -split-esimd -lower-esimd -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t_esimd_0.ll
; RUN: FileCheck %s -input-file=%t_0.esimd.ll

target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
target triple = "spir64-unknown-unknown"
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4 changes: 2 additions & 2 deletions llvm/test/tools/sycl-post-link/sycl-esimd/no-sycl-esimd-split-shared-func.ll
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Expand Up @@ -8,7 +8,7 @@
; RUN: sycl-post-link -properties -lower-esimd -symbols -split=auto -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t.table --check-prefixes CHECK-TABLE
; RUN: FileCheck %s -input-file=%t_0.sym --check-prefixes CHECK-HELPERS-SYM-1
; RUN: FileCheck %s -input-file=%t_esimd_1.sym --check-prefixes CHECK-HELPERS-SYM-2
; RUN: FileCheck %s -input-file=%t_1.esimd.sym --check-prefixes CHECK-HELPERS-SYM-2
; RUN: FileCheck %s -input-file=%t_2.sym --check-prefixes CHECK-ESIMD-SYM
; RUN: FileCheck %s -input-file=%t_2.ll

Expand All @@ -20,7 +20,7 @@
; SIMD_CALL_HELPER_* functions generated by the compiler, because we don't
; expect them to be referenced externally.
; CHECK-TABLE: {{.*}}_0.ll|{{.*}}_0.prop|{{.*}}_0.sym
; CHECK-TABLE: {{.*}}_esimd_1.ll|{{.*}}_esimd_1.prop|{{.*}}_esimd_1.sym
; CHECK-TABLE: {{.*}}_1.esimd.ll|{{.*}}_1.esimd.prop|{{.*}}_1.esimd.sym
; CHECK-TABLE: {{.*}}_2.ll|{{.*}}_2.prop|{{.*}}_2.sym
; CHECK-TABLE-EMPTY:

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4 changes: 2 additions & 2 deletions llvm/test/tools/sycl-post-link/sycl-esimd/optnone.ll
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@@ -1,9 +1,9 @@
; This ensures we remove optnone from ESIMD functions unless they are SIMT or we didn't split ESIMD code out.
; RUN: sycl-post-link -properties -split-esimd -lower-esimd -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t_esimd_0.ll --check-prefixes CHECK,CHECK-ESIMD-SPLIT
; RUN: FileCheck %s -input-file=%t_0.esimd.ll --check-prefixes CHECK,CHECK-ESIMD-SPLIT

; RUN: sycl-post-link -properties -lower-esimd -S < %s -o %t1.table
; RUN: FileCheck %s -input-file=%t1_esimd_0.ll --check-prefixes CHECK,CHECK-NO-ESIMD-SPLIT
; RUN: FileCheck %s -input-file=%t1_0.esimd.ll --check-prefixes CHECK,CHECK-NO-ESIMD-SPLIT
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
target triple = "spir64-unknown-unknown"

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8 changes: 4 additions & 4 deletions llvm/test/tools/sycl-post-link/sycl-esimd/sycl-esimd-split-per-kernel.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@
; RUN: FileCheck %s -input-file=%t.table
; RUN: FileCheck %s -input-file=%t_0.ll --check-prefixes CHECK-SYCL-IR-0
; RUN: FileCheck %s -input-file=%t_1.ll --check-prefixes CHECK-SYCL-IR-1
; RUN: FileCheck %s -input-file=%t_esimd_2.ll --check-prefixes CHECK-ESIMD-IR-2
; RUN: FileCheck %s -input-file=%t_esimd_3.ll --check-prefixes CHECK-ESIMD-IR-3
; RUN: FileCheck %s -input-file=%t_2.esimd.ll --check-prefixes CHECK-ESIMD-IR-2
; RUN: FileCheck %s -input-file=%t_3.esimd.ll --check-prefixes CHECK-ESIMD-IR-3

; This test checks that after we split SYCL and ESIMD kernels into
; separate modules, we split those two modules further according to
Expand Down Expand Up @@ -54,8 +54,8 @@ attributes #1 = { "sycl-module-id"="a.cpp" }
; CHECK: [Code|Properties]
; CHECK-DAG: {{.*}}tmp_0.ll|{{.*}}_0.prop
; CHECK-DAG: {{.*}}tmp_1.ll|{{.*}}_1.prop
; CHECK-DAG: {{.*}}tmp_esimd_2.ll|{{.*}}_esimd_2.prop
; CHECK-DAG: {{.*}}tmp_esimd_3.ll|{{.*}}_esimd_3.prop
; CHECK-DAG: {{.*}}tmp_2.esimd.ll|{{.*}}_2.esimd.prop
; CHECK-DAG: {{.*}}tmp_3.esimd.ll|{{.*}}_3.esimd.prop

; CHECK-SYCL-IR-1-DAG: define dso_local spir_kernel void @SYCL_kernel1()
; CHECK-SYCL-IR-1-DAG: declare dso_local spir_func i64 @_Z28__spirv_GlobalInvocationId_xv()
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/tools/sycl-post-link/sycl-esimd/sycl-esimd-split-per-source.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@
; RUN: FileCheck %s -input-file=%t.table
; RUN: FileCheck %s -input-file=%t_0.ll --check-prefixes CHECK-SYCL-IR-0
; RUN: FileCheck %s -input-file=%t_1.ll --check-prefixes CHECK-SYCL-IR-1
; RUN: FileCheck %s -input-file=%t_esimd_0.ll --check-prefixes CHECK-ESIMD-IR-0
; RUN: FileCheck %s -input-file=%t_esimd_1.ll --check-prefixes CHECK-ESIMD-IR-1
; RUN: FileCheck %s -input-file=%t_0.esimd.ll --check-prefixes CHECK-ESIMD-IR-0
; RUN: FileCheck %s -input-file=%t_1.esimd.ll --check-prefixes CHECK-ESIMD-IR-1

; This test checks that after we split SYCL and ESIMD kernels into
; separate modules, we split those two modules further according to
Expand Down Expand Up @@ -68,8 +68,8 @@ attributes #1 = { "sycl-module-id"="b.cpp" }
; CHECK: [Code|Properties]
; CHECK-DAG: {{.*}}tmp_0.ll|{{.*}}_0.prop
; CHECK-DAG: {{.*}}tmp_1.ll|{{.*}}_1.prop
; CHECK-DAG: {{.*}}tmp_esimd_0.ll|{{.*}}_esimd_0.prop
; CHECK-DAG: {{.*}}tmp_esimd_1.ll|{{.*}}_esimd_1.prop
; CHECK-DAG: {{.*}}tmp_0.esimd.ll|{{.*}}_0.esimd.prop
; CHECK-DAG: {{.*}}tmp_1.esimd.ll|{{.*}}_1.esimd.prop

; CHECK-SYCL-IR-1-DAG: define dso_local spir_kernel void @SYCL_kernel1()
; CHECK-SYCL-IR-1-DAG: define dso_local spir_kernel void @SYCL_kernel2()
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/tools/sycl-post-link/sycl-esimd/sycl-esimd-split-symbols.ll
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
; RUN: sycl-post-link -properties -split-esimd -symbols -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t.table
; RUN: FileCheck %s -input-file=%t_0.sym --check-prefixes CHECK-SYCL-SYM
; RUN: FileCheck %s -input-file=%t_esimd_0.sym --check-prefixes CHECK-ESIMD-SYM
; RUN: FileCheck %s -input-file=%t_0.esimd.sym --check-prefixes CHECK-ESIMD-SYM

; This test checks symbols generation when we split SYCL and ESIMD kernels into
; separate modules.
Expand Down Expand Up @@ -49,7 +49,7 @@ attributes #1 = { "sycl-module-id"="b.cpp" }

; CHECK: [Code|Properties|Symbols]
; CHECK-DAG: {{.*}}tmp_0.ll|{{.*}}_0.prop|{{.*}}_0.sym
; CHECK-DAG: {{.*}}tmp_esimd_0.ll|{{.*}}_esimd_0.prop|{{.*}}_esimd_0.sym
; CHECK-DAG: {{.*}}tmp_0.esimd.ll|{{.*}}_0.esimd.prop|{{.*}}_0.esimd.sym

; CHECK-SYCL-SYM: SYCL_kernel1
; CHECK-SYCL-SYM: SYCL_kernel2
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/tools/sycl-post-link/sycl-esimd/sycl-post-link-test.ll
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@@ -1,6 +1,6 @@
; -O0 lowering, requires `-force-disable-esimd-opt` to disable all optimizations.
; RUN: sycl-post-link -properties -split-esimd -lower-esimd -O0 -force-disable-esimd-opt -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t_esimd_0.ll
; RUN: FileCheck %s -input-file=%t_0.esimd.ll
; This test checks that IR code below can be successfully processed by
; sycl-post-link. In this IR no extractelement instruction and no casting are used

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2 changes: 1 addition & 1 deletion llvm/test/tools/sycl-post-link/sycl-external-funcs/split-and-lower-esimd.ll
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@@ -1,5 +1,5 @@
; RUN: sycl-post-link -properties -split=auto -split-esimd -lower-esimd -O0 -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t_esimd_0.ll
; RUN: FileCheck %s -input-file=%t_0.esimd.ll

; This test checks that unreferenced functions with sycl-module-id
; attribute are not dropped from the module and ESIMD lowering
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14 changes: 7 additions & 7 deletions llvm/test/tools/sycl-post-link/sycl-grf-size.ll
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Expand Up @@ -2,22 +2,22 @@

; RUN: sycl-post-link -properties -split=source -symbols -split-esimd -lower-esimd -S < %s -o %t.table
; RUN: FileCheck %s -input-file=%t.table
; RUN: FileCheck %s -input-file=%t_esimd_0.ll --check-prefixes CHECK-ESIMD-LargeGRF-IR --implicit-check-not='__ESIMD_kernel()'
; RUN: FileCheck %s -input-file=%t_esimd_0.prop --check-prefixes CHECK-ESIMD-LargeGRF-PROP
; RUN: FileCheck %s -input-file=%t_esimd_0.sym --check-prefixes CHECK-ESIMD-LargeGRF-SYM
; RUN: FileCheck %s -input-file=%t_0.esimd.ll --check-prefixes CHECK-ESIMD-LargeGRF-IR --implicit-check-not='__ESIMD_kernel()'
; RUN: FileCheck %s -input-file=%t_0.esimd.prop --check-prefixes CHECK-ESIMD-LargeGRF-PROP
; RUN: FileCheck %s -input-file=%t_0.esimd.sym --check-prefixes CHECK-ESIMD-LargeGRF-SYM
; RUN: FileCheck %s -input-file=%t_1.ll --check-prefixes CHECK-SYCL-LargeGRF-IR --implicit-check-not='__SYCL_kernel()'
; RUN: FileCheck %s -input-file=%t_1.prop --check-prefixes CHECK-SYCL-LargeGRF-PROP
; RUN: FileCheck %s -input-file=%t_1.sym --check-prefixes CHECK-SYCL-LargeGRF-SYM
; RUN: FileCheck %s -input-file=%t_3.ll --check-prefixes CHECK-SYCL-IR --implicit-check-not='__SYCL_kernel_large_grf()'
; RUN: FileCheck %s -input-file=%t_3.prop --check-prefixes CHECK-SYCL-PROP
; RUN: FileCheck %s -input-file=%t_3.sym --check-prefixes CHECK-SYCL-SYM
; RUN: FileCheck %s -input-file=%t_esimd_2.ll --check-prefixes CHECK-ESIMD-IR --implicit-check-not='__ESIMD_large_grf_kernel()'
; RUN: FileCheck %s -input-file=%t_esimd_2.prop --check-prefixes CHECK-ESIMD-PROP
; RUN: FileCheck %s -input-file=%t_2.esimd.ll --check-prefixes CHECK-ESIMD-IR --implicit-check-not='__ESIMD_large_grf_kernel()'
; RUN: FileCheck %s -input-file=%t_2.esimd.prop --check-prefixes CHECK-ESIMD-PROP

; CHECK: [Code|Properties|Symbols]
; CHECK: {{.*}}_esimd_0.ll|{{.*}}_esimd_0.prop|{{.*}}_esimd_0.sym
; CHECK: {{.*}}_0.esimd.ll|{{.*}}_0.esimd.prop|{{.*}}_0.esimd.sym
; CHECK: {{.*}}_1.ll|{{.*}}_1.prop|{{.*}}_1.sym
; CHECK: {{.*}}_esimd_2.ll|{{.*}}_esimd_2.prop|{{.*}}_esimd_2.sym
; CHECK: {{.*}}_2.esimd.ll|{{.*}}_2.esimd.prop|{{.*}}_2.esimd.sym

; CHECK-ESIMD-LargeGRF-PROP: isEsimdImage=1|1
; CHECK-ESIMD-LargeGRF-PROP: sycl-grf-size=1|256
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