refactor: remove unnecessary conditional compilations

alioth/src/arch/arch.rs

@@ -12,12 +12,10 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#[cfg(target_arch = "aarch64")]
 #[path = "aarch64/aarch64.rs"]
-mod aarch64;
-#[cfg(target_arch = "x86_64")]
+pub mod aarch64;
 #[path = "x86_64/x86_64.rs"]
-mod x86_64;
+pub mod x86_64;
 
 #[cfg(target_arch = "aarch64")]
 pub use self::aarch64::*;

alioth/src/arch/x86_64/ioapic.rs

@@ -14,7 +14,7 @@
 
 use bitfield::bitfield;
 
-use crate::arch::intr::DeliveryMode;
+use crate::arch::x86_64::intr::DeliveryMode;
 
 pub const IOREGSEL: u64 = 0x00;
 pub const IOWIN: u64 = 0x10;

alioth/src/device/device.rs

@@ -25,14 +25,10 @@ pub mod console;
 #[path = "fw_cfg/fw_cfg.rs"]
 pub mod fw_cfg;
 pub mod fw_dbg;
-#[cfg(target_arch = "x86_64")]
 pub mod ioapic;
 pub mod net;
-#[cfg(target_arch = "aarch64")]
 pub mod pl011;
-#[cfg(target_arch = "aarch64")]
 pub mod pl031;
-#[cfg(target_arch = "x86_64")]
 pub mod serial;
 
 #[trace_error]

alioth/src/device/fw_cfg/fw_cfg.rs

@@ -12,18 +12,14 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#[cfg(target_arch = "x86_64")]
 pub mod acpi;
 
 use std::ffi::CString;
 use std::fmt;
 use std::fs::File;
 use std::io::{ErrorKind, Read, Result, Seek, SeekFrom};
-#[cfg(target_arch = "x86_64")]
-use std::mem::size_of;
-use std::mem::size_of_val;
+use std::mem::{size_of, size_of_val};
 use std::os::unix::fs::FileExt;
-#[cfg(target_arch = "x86_64")]
 use std::path::Path;
 use std::sync::Arc;
 
@@ -35,12 +31,10 @@ use serde::{Deserialize, Deserializer};
 use serde_aco::Help;
 use zerocopy::{FromBytes, Immutable, IntoBytes};
 
-#[cfg(target_arch = "x86_64")]
 use crate::arch::layout::{
     PORT_FW_CFG_DATA, PORT_FW_CFG_DMA_HI, PORT_FW_CFG_DMA_LO, PORT_FW_CFG_SELECTOR,
 };
 use crate::device::{self, MmioDev, Pause};
-#[cfg(target_arch = "x86_64")]
 use crate::firmware::acpi::AcpiTable;
 #[cfg(target_arch = "x86_64")]
 use crate::loader::linux::bootparams::{
@@ -49,11 +43,9 @@ use crate::loader::linux::bootparams::{
 use crate::mem;
 use crate::mem::emulated::{Action, Mmio};
 use crate::mem::mapped::RamBus;
-#[cfg(target_arch = "x86_64")]
 use crate::mem::{MemRegionEntry, MemRegionType};
 use crate::utils::endian::{Bu16, Bu32, Bu64, Lu16, Lu32, Lu64};
 
-#[cfg(target_arch = "x86_64")]
 use self::acpi::create_acpi_loader;
 
 pub const SELECTOR_WR: u16 = 1 << 14;
@@ -288,7 +280,6 @@ impl FwCfg {
         self.known_items[FW_CFG_NB_CPUS as usize] = FwCfgContent::Lu16(count.into());
     }
 
-    #[cfg(target_arch = "x86_64")]
     pub(crate) fn add_e820(&mut self, mem_regions: &[(u64, MemRegionEntry)]) -> Result<()> {
         let mut bytes = vec![];
         for (addr, region) in mem_regions.iter() {
@@ -313,15 +304,13 @@ impl FwCfg {
         self.add_item(item)
     }
 
-    #[cfg(target_arch = "x86_64")]
     pub(crate) fn add_acpi(&mut self, acpi_table: AcpiTable) -> Result<()> {
         let [table_loader, acpi_rsdp, apci_tables] = create_acpi_loader(acpi_table);
         self.add_item(table_loader)?;
         self.add_item(acpi_rsdp)?;
         self.add_item(apci_tables)
     }
 
-    #[cfg(target_arch = "x86_64")]
     pub fn add_kernel_data(&mut self, p: &Path) -> Result<()> {
         let file = File::open(p)?;
         let mut buffer = vec![0u8; size_of::<BootParams>()];

alioth/src/device/ioapic.rs

@@ -17,12 +17,12 @@
 
 use parking_lot::Mutex;
 
-use crate::arch::intr::{DestinationMode, MsiAddrLo, MsiData, TriggerMode};
-use crate::arch::ioapic::{
+use crate::arch::x86_64::intr::{DestinationMode, MsiAddrLo, MsiData, TriggerMode};
+use crate::arch::x86_64::ioapic::{
     IOAPIC_VER, IOAPICARB, IOAPICID, IOAPICVER, IOREDTBL_BASE, IOREDTBL_MAX, IOREGSEL, IOWIN,
     NUM_PINS, RedirectEntry, RegId, RegVer,
 };
-use crate::arch::layout::{APIC_START, IOAPIC_END, IOAPIC_START};
+use crate::arch::x86_64::layout::{APIC_START, IOAPIC_END, IOAPIC_START};
 use crate::device::{self, MmioDev, Pause};
 use crate::hv::MsiSender;
 use crate::mem;

alioth/src/device/pl011_test.rs

@@ -17,14 +17,14 @@ use std::time::{Duration, Instant};
 
 use assert_matches::assert_matches;
 
-use crate::arch::layout::PL011_START;
+use crate::arch::aarch64::layout::PL011_START;
 use crate::device::console::tests::TestConsole;
 use crate::device::pl011::{
     Flag, Interrupt, Pl011, UART_DR, UART_FR, UART_IMSC, UART_MIS, UART_PCELL_ID0, UART_PCELL_ID1,
     UART_PCELL_ID2, UART_PCELL_ID3, UART_PERIPH_ID0, UART_PERIPH_ID1, UART_PERIPH_ID2,
     UART_PERIPH_ID3, UART_RIS,
 };
-use crate::hv::tests::aarch64::TestIrqSender;
+use crate::hv::tests::TestIrqSender;
 use crate::mem::emulated::Mmio;
 
 fn fixture_pl011() -> Pl011<TestIrqSender, TestConsole> {

alioth/src/device/pl031_test.rs

@@ -15,7 +15,7 @@
 use assert_matches::assert_matches;
 use chrono::DateTime;
 
-use crate::arch::layout::PL031_START;
+use crate::arch::aarch64::layout::PL031_START;
 use crate::device::clock::tests::TestClock;
 use crate::device::pl031::{
     Pl031, RTC_CR, RTC_DR, RTC_ICR, RTC_IMSC, RTC_LR, RTC_MIS, RTC_MR, RTC_PCELL_ID0,

alioth/src/hv/hv.rs

@@ -25,7 +25,6 @@ use std::arch::x86_64::CpuidResult;
 use std::collections::HashMap;
 use std::fmt::Debug;
 use std::os::fd::AsFd;
-#[cfg(not(target_arch = "x86_64"))]
 use std::sync::Arc;
 use std::thread::JoinHandle;
 
@@ -225,12 +224,10 @@ pub trait Vcpu {
     fn tdx_init_mem_region(&self, data: &[u8], gpa: u64, measure: bool) -> Result<()>;
 }
 
-#[cfg(not(target_arch = "x86_64"))]
 pub trait IrqSender: Debug + Send + Sync + 'static {
     fn send(&self) -> Result<(), Error>;
 }
 
-#[cfg(not(target_arch = "x86_64"))]
 impl<T> IrqSender for Arc<T>
 where
     T: IrqSender,
@@ -269,14 +266,6 @@ pub trait IoeventFdRegistry: Debug + Send + Sync + 'static {
     type IoeventFd: IoeventFd;
     fn create(&self) -> Result<Self::IoeventFd>;
     fn register(&self, fd: &Self::IoeventFd, gpa: u64, len: u8, data: Option<u64>) -> Result<()>;
-    #[cfg(target_arch = "x86_64")]
-    fn register_port(
-        &self,
-        fd: &Self::IoeventFd,
-        port: u16,
-        len: u8,
-        data: Option<u64>,
-    ) -> Result<()>;
     fn deregister(&self, fd: &Self::IoeventFd) -> Result<()>;
 }
 
@@ -353,12 +342,10 @@ pub struct VmConfig {
 pub trait Vm {
     type Vcpu: Vcpu;
     type Memory: VmMemory;
-    #[cfg(not(target_arch = "x86_64"))]
     type IrqSender: IrqSender + Send + Sync;
     type MsiSender: MsiSender;
     type IoeventFdRegistry: IoeventFdRegistry;
     fn create_vcpu(&self, index: u16, identity: u64) -> Result<Self::Vcpu, Error>;
-    #[cfg(not(target_arch = "x86_64"))]
     fn create_irq_sender(&self, pin: u8) -> Result<Self::IrqSender, Error>;
     fn create_msi_sender(
         &self,

alioth/src/hv/hv_test.rs

@@ -12,15 +12,11 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#[cfg(target_arch = "aarch64")]
-#[path = "hv_aarch64_test.rs"]
-pub mod aarch64;
-
 use std::os::fd::{AsFd, BorrowedFd};
 
-use parking_lot::RwLock;
+use parking_lot::{Condvar, Mutex, RwLock};
 
-use crate::hv::{IrqFd, Result};
+use crate::hv::{IrqFd, IrqSender, Result};
 
 #[derive(Debug)]
 struct TestIrqFdInner {
@@ -92,3 +88,27 @@ impl AsFd for TestIrqFd {
         unreachable!()
     }
 }
+
+#[derive(Debug)]
+pub struct TestIrqSender {
+    pub count: Mutex<u8>,
+    pub condvar: Condvar,
+}
+
+impl TestIrqSender {
+    pub fn new() -> Self {
+        Self {
+            count: Mutex::new(0),
+            condvar: Condvar::new(),
+        }
+    }
+}
+
+impl IrqSender for TestIrqSender {
+    fn send(&self) -> Result<()> {
+        let mut count = self.count.lock();
+        *count += 1;
+        self.condvar.notify_one();
+        Ok(())
+    }
+}

alioth/src/hv/kvm/vm/vm.rs

@@ -31,9 +31,7 @@ use std::sync::Arc;
 use std::sync::atomic::{AtomicU32, Ordering};
 use std::thread::JoinHandle;
 
-#[cfg(not(target_arch = "x86_64"))]
-use libc::write;
-use libc::{EFD_CLOEXEC, EFD_NONBLOCK, SIGRTMIN, eventfd};
+use libc::{EFD_CLOEXEC, EFD_NONBLOCK, SIGRTMIN, eventfd, write};
 use parking_lot::{Mutex, RwLock};
 use snafu::ResultExt;
 
@@ -44,13 +42,11 @@ use crate::arch::sev::{SevPolicy, SnpPageType, SnpPolicy};
 #[cfg(target_arch = "x86_64")]
 use crate::arch::tdx::TdAttr;
 use crate::ffi;
-#[cfg(not(target_arch = "x86_64"))]
-use crate::hv::IrqSender;
 use crate::hv::kvm::vcpu::KvmVcpu;
 use crate::hv::kvm::{KvmError, check_extension, kvm_error};
 use crate::hv::{
-    Error, IoeventFd, IoeventFdRegistry, IrqFd, Kvm, MemMapOption, MsiSender, Result, Vm, VmConfig,
-    VmMemory, error,
+    Error, IoeventFd, IoeventFdRegistry, IrqFd, IrqSender, Kvm, MemMapOption, MsiSender, Result,
+    Vm, VmConfig, VmMemory, error,
 };
 #[cfg(target_arch = "x86_64")]
 use crate::sys::kvm::KVM_IRQCHIP_IOAPIC;
@@ -289,15 +285,13 @@ impl VmMemory for KvmMemory {
         Ok(())
     }
 }
-#[cfg(not(target_arch = "x86_64"))]
 #[derive(Debug)]
 pub struct KvmIrqSender {
     pin: u8,
     vm: Arc<VmInner>,
     event_fd: OwnedFd,
 }
 
-#[cfg(not(target_arch = "x86_64"))]
 impl Drop for KvmIrqSender {
     fn drop(&mut self) {
         let pin_flag = 1 << (self.pin as u32);
@@ -318,7 +312,6 @@ impl Drop for KvmIrqSender {
     }
 }
 
-#[cfg(not(target_arch = "x86_64"))]
 impl IrqSender for KvmIrqSender {
     fn send(&self) -> Result<(), Error> {
         ffi!(unsafe { write(self.event_fd.as_raw_fd(), &1u64 as *const _ as _, 8) })
@@ -591,17 +584,6 @@ impl IoeventFdRegistry for KvmIoeventFdRegistry {
         Ok(())
     }
 
-    #[cfg(target_arch = "x86_64")]
-    fn register_port(
-        &self,
-        _fd: &Self::IoeventFd,
-        _port: u16,
-        _len: u8,
-        _data: Option<u64>,
-    ) -> Result<()> {
-        unimplemented!()
-    }
-
     fn deregister(&self, fd: &Self::IoeventFd) -> Result<()> {
         let mut fds = self.vm.ioeventfds.lock();
         if let Some(mut request) = fds.remove(&fd.as_fd().as_raw_fd()) {
@@ -652,7 +634,6 @@ impl Vm for KvmVm {
     #[cfg(target_arch = "aarch64")]
     type GicV3 = aarch64::KvmGicV3;
     type IoeventFdRegistry = KvmIoeventFdRegistry;
-    #[cfg(not(target_arch = "x86_64"))]
     type IrqSender = KvmIrqSender;
     #[cfg(target_arch = "aarch64")]
     type Its = aarch64::KvmIts;
@@ -680,7 +661,6 @@ impl Vm for KvmVm {
         }
     }
 
-    #[cfg(not(target_arch = "x86_64"))]
     fn create_irq_sender(&self, pin: u8) -> Result<Self::IrqSender, Error> {
         let pin_flag = 1 << pin;
         if self.vm.pin_map.fetch_or(pin_flag, Ordering::AcqRel) & pin_flag == pin_flag {