Discrete Cosine Transform verification in systemverilog and systemC
Verilator is being used to convert the dct rtl verilog file to systemC
testbenchcan be found in folder./xapp611/tb
- used to generate matrices to be driven to
DUT - used
opencv2andnumpymodules
to run go to sim folder and do
sh idct.sh or sh dct.sh appropriately