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[TH1520] Cherry-pick reset with upstream mainline driver#238

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[TH1520] Cherry-pick reset with upstream mainline driver#238
zhuzhenxxx-collab wants to merge 1214 commits intoRVCK-Project:rvck-6.6from
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@zhuzhenxxx-collab zhuzhenxxx-collab commented Mar 12, 2026

TH1520 SoC 的 reset 驱动模块已在主线内核（mainline）中获得支持。为减少代码维护负担并统一使用主线实现，现将主线仓库中的th1520-reset模块 同步到当前仓库。（当前仓库已revert 旧实现）

issue: #236

kevin-zhm and others added 30 commits March 1, 2026 22:29
@kevin-zhm @sterling-teng
riscv: dts: enable uart0 for spacemit k3
6c60ad7 
community inclusion
category: feature
bugzilla: RVCK-Project#155

--------------------------------

Enable uart0 for system console.

Signed-off-by: Zhang Meng <zhangmeng.kevin@spacemit.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@kevin-zhm @sterling-teng
riscv: defconfig: enable spacemit k3 soc
b41b1d2 
community inclusion
category: feature
bugzilla: RVCK-Project#155

--------------------------------

Enable CONFIG_SOC_SPACEMIT_K3 and CONFIG_SPACEMIT_K3_CCU for spacemit k3

Signed-off-by: Zhang Meng <zhangmeng.kevin@spacemit.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@bjdooks-ct @sterling-teng
riscv: save the SR_SUM status over switches
bd384d1 
mainline inclusion
from mainline-v6.15-rc6
commit 788aa64
category: feature
bugzilla: RVCK-Project#177

--------------------------------

When threads/tasks are switched we need to ensure the old execution's
SR_SUM state is saved and the new thread has the old SR_SUM state
restored.

The issue was seen under heavy load especially with the syz-stress tool
running, with crashes as follows in schedule_tail:

Unable to handle kernel access to user memory without uaccess routines
at virtual address 000000002749f0d0
Oops [RVCK-Project#1]
Modules linked in:
CPU: 1 PID: 4875 Comm: syz-executor.0 Not tainted
5.12.0-rc2-syzkaller-00467-g0d7588ab9ef9 #0
Hardware name: riscv-virtio,qemu (DT)
epc : schedule_tail+0x72/0xb2 kernel/sched/core.c:4264
 ra : task_pid_vnr include/linux/sched.h:1421 [inline]
 ra : schedule_tail+0x70/0xb2 kernel/sched/core.c:4264
epc : ffffffe00008c8b0 ra : ffffffe00008c8ae sp : ffffffe025d17ec0
 gp : ffffffe005d25378 tp : ffffffe00f0d0000 t0 : 0000000000000000
 t1 : 0000000000000001 t2 : 00000000000f4240 s0 : ffffffe025d17ee0
 s1 : 000000002749f0d0 a0 : 000000000000002a a1 : 0000000000000003
 a2 : 1ffffffc0cfac500 a3 : ffffffe0000c80cc a4 : 5ae9db91c19bbe00
 a5 : 0000000000000000 a6 : 0000000000f00000 a7 : ffffffe000082eba
 s2 : 0000000000040000 s3 : ffffffe00eef96c0 s4 : ffffffe022c77fe0
 s5 : 0000000000004000 s6 : ffffffe067d74e00 s7 : ffffffe067d74850
 s8 : ffffffe067d73e18 s9 : ffffffe067d74e00 s10: ffffffe00eef96e8
 s11: 000000ae6cdf8368 t3 : 5ae9db91c19bbe00 t4 : ffffffc4043cafb2
 t5 : ffffffc4043cafba t6 : 0000000000040000
status: 0000000000000120 badaddr: 000000002749f0d0 cause:
000000000000000f
Call Trace:
[<ffffffe00008c8b0>] schedule_tail+0x72/0xb2 kernel/sched/core.c:4264
[<ffffffe000005570>] ret_from_exception+0x0/0x14
Dumping ftrace buffer:
   (ftrace buffer empty)
---[ end trace b5f8f9231dc87dda ]---

The issue comes from the put_user() in schedule_tail
(kernel/sched/core.c) doing the following:

asmlinkage __visible void schedule_tail(struct task_struct *prev)
{
...
        if (current->set_child_tid)
                put_user(task_pid_vnr(current), current->set_child_tid);
...
}

the put_user() macro causes the code sequence to come out as follows:

1:	__enable_user_access()
2:	reg = task_pid_vnr(current);
3:	*current->set_child_tid = reg;
4:	__disable_user_access()

The problem is that we may have a sleeping function as argument which
could clear SR_SUM causing the panic above. This was fixed by
evaluating the argument of the put_user() macro outside the user-enabled
section in commit 285a76b ("riscv: evaluate put_user() arg before
enabling user access")"

In order for riscv to take advantage of unsafe_get/put_XXX() macros and
to avoid the same issue we had with put_user() and sleeping functions we
must ensure code flow can go through switch_to() from within a region of
code with SR_SUM enabled and come back with SR_SUM still enabled. This
patch addresses the problem allowing future work to enable full use of
unsafe_get/put_XXX() macros without needing to take a CSR bit flip cost
on every access. Make switch_to() save and restore SR_SUM.

Reported-by: syzbot+e74b94fe601ab9552d69@syzkaller.appspotmail.com
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Cyril Bur <cyrilbur@tenstorrent.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Deepak Gupta <debug@rivosinc.com>
Link: https://lore.kernel.org/r/20250410070526.3160847-2-cyrilbur@tenstorrent.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Rui Gao <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@xhackerustc @sterling-teng
riscv: implement user_access_begin() and families
d129224 
mainline inclusion
from mainline-v6.15-rc6
commit 19500c6
category: feature
bugzilla: RVCK-Project#177

--------------------------------

Currently, when a function like strncpy_from_user() is called,
the userspace access protection is disabled and enabled
for every word read.

By implementing user_access_begin() and families, the protection
is disabled at the beginning of the copy and enabled at the end.

The __inttype macro is borrowed from x86 implementation.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Cyril Bur <cyrilbur@tenstorrent.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250410070526.3160847-3-cyrilbur@tenstorrent.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Rui Gao <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@xhackerustc @sterling-teng
riscv: uaccess: use input constraints for ptr of __put_user()
1aa1da3 
mainline inclusion
from mainline-v6.15-rc6
commit 62135bf
category: feature
bugzilla: RVCK-Project#177

--------------------------------

Putting ptr in the inputs as opposed to output may seem incorrect but
this is done for a few reasons:
- Not having it in the output permits the use of asm goto in a
  subsequent patch. There are bugs in gcc [1] which would otherwise
  prevent it.
- Since the output memory is userspace there isn't any real benefit from
  telling the compiler about the memory clobber.
- x86, arm and powerpc all use this technique.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113921 # 1

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
[Cyril Bur: Rewritten commit message]
Signed-off-by: Cyril Bur <cyrilbur@tenstorrent.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250410070526.3160847-4-cyrilbur@tenstorrent.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Rui Gao <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@xhackerustc @sterling-teng
riscv: uaccess: use 'asm goto' for put_user()
8fc83c0 
mainline inclusion
from mainline-v6.15-rc6
commit cdf647e
category: feature
bugzilla: RVCK-Project#177

--------------------------------

With 'asm goto' we don't need to test the error etc, the exception just
jumps to the error handling directly.

Because there are no output clobbers which could trigger gcc bugs [1]
the use of asm_goto_output() macro is not necessary here. Not using
asm_goto_output() is desirable as the generated output asm will be
cleaner.

Use of the volatile keyword is redundant as per gcc 14.2.0 manual section
6.48.2.7 Goto Labels:
> Also note that an asm goto statement is always implicitly considered
  volatile.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113921 # 1

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
[Cyril Bur: Rewritten commit message]
Signed-off-by: Cyril Bur <cyrilbur@tenstorrent.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250410070526.3160847-5-cyrilbur@tenstorrent.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Rui Gao <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@xhackerustc @sterling-teng
riscv: uaccess: use 'asm_goto_output' for get_user()
0225dcf 
mainline inclusion
from mainline-v6.15-rc6
commit f6bff78
category: feature
bugzilla: RVCK-Project#177

--------------------------------

With 'asm goto' we don't need to test the error etc, the exception just
jumps to the error handling directly.

Unlike put_user(), get_user() must work around GCC bugs [1] when using
output clobbers in an asm goto statement.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113921 # 1

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
[Cyril Bur: Rewritten commit message]
Signed-off-by: Cyril Bur <cyrilbur@tenstorrent.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250410070526.3160847-6-cyrilbur@tenstorrent.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Rui Gao <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@sterling-teng
riscv: make unsafe user copy routines use existing assembly routines
89179da 
mainline inclusion
from mainline-v6.16-rc1
commit a434854
category: feature
bugzilla: RVCK-Project#177

--------------------------------

The current implementation is underperforming and in addition, it
triggers misaligned access traps on platforms which do not handle
misaligned accesses in hardware.

Use the existing assembly routines to solve both problems at once.

Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250602193918.868962-2-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Rui Gao <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@clementleger @sterling-teng
riscv: uaccess: do not do misaligned accesses in get/put_user()
1e737b0 
mainline inclusion
from mainline-v6.16-rc1
commit ca1a66c
category: feature
bugzilla: RVCK-Project#177

--------------------------------

Doing misaligned access to userspace memory would make a trap on
platform where it is emulated. Latest fixes removed the kernel
capability to do unaligned accesses to userspace memory safely since
interrupts are kept disabled at all time during that. Thus doing so
would crash the kernel.

Such behavior was detected with GET_UNALIGN_CTL() that was doing
a put_user() with an unsigned long* address that should have been an
unsigned int*. Reenabling kernel misaligned access emulation is a bit
risky and it would also degrade performances. Rather than doing that,
we will try to avoid any misaligned accessed by using copy_from/to_user()
which does not do any misaligned accesses. This can be done only for
!CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS and thus allows to only generate
a bit more code for this config.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250602193918.868962-4-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Rui Gao <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@WangJia-UR @sterling-teng
Revert "riscv: dp1000: plic: fix plic claim register hardware bug"
2bd67ee 
community inclusion
category: feature
bugzilla: RVCK-Project#71

--------------------------------

This reverts commit fdf4ec2.

Implement using the upstream mainline.

Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@WangJia-UR @sterling-teng
Revert "riscv: dp1000: bindings: Add UltraRISC DP1000 PLIC in interru…
68a128b 
…pr-controller"

community inclusion
category: feature
bugzilla: RVCK-Project#71

--------------------------------

This reverts commit a810a59.

Implement using the upstream mainline.

Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@charlie-rivos @sterling-teng
irqchip/sifive-plic: Return error code on failure
3707e1c 
mainline inclusion
from mainline-v6.12-rc4
commit 6eabf65
category: feature
bugzilla: RVCK-Project#71

--------------------------------

Set error to -ENOMEM if kcalloc() fails or if irq_domain_add_linear()
fails inside of plic_probe() instead of returning 0.

Fixes: 4d936f1 ("irqchip/sifive-plic: Probe plic driver early for Allwinner D1 platform")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/all/20240903-correct_error_codes_sifive_plic-v1-1-d929b79663a2@rivosinc.com
Closes: https://lore.kernel.org/r/202409031122.yBh8HrxA-lkp@intel.com/
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@sterling-teng
irqchip/sifive-plic: Use for_each_present_cpu() instead of for_each_c…
09ed418 
…pu()

mainline inclusion
from mainline-v6.18-rc1
commit b92ff23
category: feature
bugzilla: RVCK-Project#71

--------------------------------

Replace the open coded for_each_cpu(cpu, cpu_present_mask) loop with the
more readable and equivalent for_each_present_cpu(cpu) macro.

Signed-off-by: Fushuai Wang <wangfushuai@baidu.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20250811064701.2906-1-wangfushuai@baidu.com
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@sterling-teng
irqchip/sifive-plic: Cache the interrupt enable state
68adea8 
mainline inclusion
from mainline-v6.19-rc1
commit 14ff9e5
category: feature
bugzilla: RVCK-Project#71

--------------------------------

Optimize the PLIC driver by maintaining the interrupt enable state in the
handler's enable_save array during normal operation rather than only during
suspend/resume. This eliminates the need to read enable registers during
suspend and makes the enable state immediately available for other
purposes.

Let __plic_toggle() update both the hardware registers and the cached
enable_save state atomically within the existing enable_lock protection.

That allows to remove the suspend-time enable register reading since
handler::enable_save now always reflects the current state.

[ tglx: Massaged change log ]

Signed-off-by: Charles Mirabile <cmirabil@redhat.com>
Signed-off-by: Lucas Zampieri <lzampier@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/20251024083647.475239-4-lzampier@redhat.com
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@sterling-teng
irqchip/sifive-plic: Add support for UltraRISC DP1000 PLIC
3bc36d8 
mainline inclusion
from mainline-v6.19-rc1
commit 539d147
category: feature
bugzilla: RVCK-Project#71

--------------------------------

Add a new compatible for the plic found in UltraRISC DP1000 with a quirk to
work around a known hardware bug with IRQ claiming in the UR-CP100 cores.

When claiming an interrupt on UR-CP100 cores, all other interrupts must be
disabled before the claim register is accessed to prevent incorrect
handling of the interrupt. This is a hardware bug in the CP100 core
implementation, not specific to the DP1000 SoC.

When the PLIC_QUIRK_CP100_CLAIM_REGISTER_ERRATUM flag is present, a
specialized handler (plic_handle_irq_cp100) disables all interrupts except
for the first pending one before reading the claim register, and then
restores the interrupts before further processing of the claimed interrupt
continues.

This implementation leverages the enable_save optimization, which maintains
the current interrupt enable state in memory, avoiding additional register
reads during the workaround.

The driver matches on "ultrarisc,cp100-plic" to apply the quirk to all
SoCs using UR-CP100 cores, regardless of the specific SoC implementation.
This has no impact on other platforms.

[ tglx: Condensed the code a bit, massaged change log and comments ]

Co-developed-by: Zhang Xincheng <zhangxincheng@ultrarisc.com>
Signed-off-by: Zhang Xincheng <zhangxincheng@ultrarisc.com>
Signed-off-by: Charles Mirabile <cmirabil@redhat.com>
Signed-off-by: Lucas Zampieri <lzampier@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Samuel Holland <samuel.holland@sifive.com>
Link: https://patch.msgid.link/20251024083647.475239-5-lzampier@redhat.com
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@sterling-teng
dt-bindings: interrupt-controller: Add UltraRISC DP1000 PLIC
ee15a24 
mainline inclusion
from mainline-v6.19-rc1
commit 9dfb295
category: feature
bugzilla: RVCK-Project#71

--------------------------------

Add compatible strings for the PLIC found in UltraRISC DP1000 SoC.

The PLIC is part of the UR-CP100 core and has a hardware bug requiring
a workaround.

Signed-off-by: Charles Mirabile <cmirabil@redhat.com>
Signed-off-by: Lucas Zampieri <lzampier@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20251024083647.475239-3-lzampier@redhat.com
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@sterling-teng
irqchip/sifive-plic: Fix call to __plic_toggle() in M-Mode code path
49e5728 
mainline inclusion
from mainline-v6.19-rc1
commit a045359
category: feature
bugzilla: RVCK-Project#71

--------------------------------

The code path for M-Mode linux that disables interrupts for other contexts
was missed when refactoring __plic_toggle().

Since the new version caches updates to the state for the primary context,
its use in this codepath is no longer desireable even if it could be made
correct.

Replace the calls to __plic_toggle() with a loop that simply disables all
of the interrupts in groups of 32 with a direct mmio write.

Fixes: 14ff9e5 ("irqchip/sifive-plic: Cache the interrupt enable state")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Charles Mirabile <cmirabil@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/20251103161813.2437427-1-cmirabil@redhat.com
Closes: https://lore.kernel.org/oe-kbuild-all/202510271316.AQM7gCCy-lkp@intel.com/
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@WangJia-UR @sterling-teng
riscv: dts: ultrarisc: Update DP1000 series device tree files
b5486b7 
community inclusion
category: feature
bugzilla: RVCK-Project#71

--------------------------------

1. Remove aer interrupt from PCIe nodes:
   The PCIe nodes in DP1000 series devices do not support Advanced Error
   Reporting (AER) interrupt. Remove the aer interrupt from interrupts and
   interrupt-names properties in all affected device tree files.

2. Add cache information:
   Add detailed L1 I-cache and D-cache configuration (64B block size, 4-way set
   associative, 64KB size per core) and L3 cache configuration to CPU nodes.

3. Extend ISA information:
   Add comprehensive ISA base and extension list to CPU nodes, including
   standard extensions and custom extensions.

4. Update key-wakeup for titan board:
   - Rename existing key-wakeup to key-wakeup@0
   - Add key-wakeup@1 (Power key) on porta 11
   - Add key-wakeup@2 (USB wakeup) on porta 4

5. Add ethernet MDIO and PHY configuration:
   Configure MDIO bus and PHY0 for ethernet interface on titan board.

Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@WangJia-UR @sterling-teng
hwmon: corepvt-ultrarisc: Add UltraRISC Core PVT sensor driver
8c9605c 
community inclusion
category: feature
bugzilla: RVCK-Project#71

--------------------------------

Add support for UltraRISC Core PVT (Voltage, Temperature) sensor
embedded into dp1000 series SoCs.

The driver provides:
1. Support for 11 temperature channels (cores and SoC components)
2. Support for 2 voltage channels (cluster voltages)
3. Hardware monitoring via hwmon interface
4. Device tree based configuration

Add necessary Kconfig and Makefile entries, and update device tree with
PVT sensor nodes and channel configurations.

Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@WangJia-UR @sterling-teng
dt-bindings: hwmon: Add UltraRISC DP1000 Core PVT sensor binding
06535b2 
community inclusion
category: feature
bugzilla: RVCK-Project#71

--------------------------------

Add device tree binding documentation for UltraRISC DP1000
Core voltage and temperature (PVT) sensor.

Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@WangJia-UR @sterling-teng
riscv: defconfig: Enable COREPVT_ULTRARISC and GPIO_KEY
79676dd 
community inclusion
category: feature
bugzilla: RVCK-Project#71

--------------------------------

Add support for UltraRISC Core PVT sensor driver by enabling
CONFIG_SENSORS_COREPVT_ULTRARISC=m.
Enable CONFIG_KEYBOARD_GPIO=m.

Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@WangJia-UR @sterling-teng
riscv: dts: ultrarisc: Fix naming inconsistencies in dp1000 files
853db98 
community inclusion
category: feature
bugzilla: RVCK-Project#71

--------------------------------

Fix naming inconsistencies in dp1000 device tree files:
1. Correct filename typo: dp1000-mo-* -> dp1000-m0-*(replace letter 'o'
with digit '0')
2. Rename pinctrl header to use company prefix: ur-dp1000-pinctrl.h ->
ultrarisc,dp1000-pinctrl.h
3. Update all include paths to match the new filename

Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@WangJia-UR @sterling-teng
dt-bindings: pinctrl: Rename pinctrl header ur-dp1000-pinctrl.h to ul…
977bfbf 
…trarisc,dp1000-pinctrl.h

community inclusion
category: feature
bugzilla: RVCK-Project#71

--------------------------------

Rename pinctrl header to use company prefix: ur-dp1000-pinctrl.h ->
ultrarisc,dp1000-pinctrl.h

Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@WangJia-UR @sterling-teng
riscv: defconfig: Enable FW_LOADER_COMPRESS_ZSTD DRM_AMD_ACP and DRM_…
9e29b3b 
…AMD_SECURE_DISPLAY

community inclusion
category: feature
bugzilla: RVCK-Project#71

--------------------------------

Enable CONFIG_FW_LOADER_COMPRESS_ZSTD to support loading zstd compressed
firmware files. This is required for compatibility with distributions
like Ubuntu which use zstd compression for firmware files.

Enable CONFIG_DRM_AMD_ACP and CONFIG_DRM_AMD_SECURE_DISPLAY for AMD GPU.

Enable CONFIG_RTC_DRV_DS1307_CENTURY and CONFIG_RTC_DRV_SD3078.

Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@sterling-teng
Revert "mango pci hack:broadcast when no MSI source known"
232181c 
mainline inclusion
category bugfix from
mainline-v6.2-rc1
commit: torvalds/linux@a1ccd3d
Link:RVCK-Project#181

-------------------------------------------------
Revert "mango pci hack:broadcast when no MSI source known"

This reverts commit 24fb032.

This merge requires a revert, as disabling the PCIe port native services
will severely impact the normal operation of the server's PCIe advanced
features (such as AER/DPC/HP).

original changelog

PCI/portdrv: Squash into portdrv.c
Squash portdrv_core.c and portdrv_pci.c into portdrv.c to make it easier
to find things.  The whole thing is less than 1000 lines, and it's a
pain to bounce back and forth between two files.

Several portdrv_core.c functions were non-static because they were
referenced from portdrv_pci.c.  Make them static since they're now all
in portdrv.c.

No functional change intended.

Link: https://lore.kernel.org/r/20221019204127.44463-2-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: liuqingtao <liu.qingtao2@zte.com.cn>
Signed-off-by: hu.yuye<hu.yuye@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@andy-shev @sterling-teng
serial: 8250_core: Remove unneeded ->iotype assignment
1121510 
mainline inclusion
from mainline-v6.14-rc3
commit 34bbb5d
category: feature
bugzilla: RVCK-Project#186

Reference: torvalds/linux@34bbb5d

--------------------------------

If ->iobase is set the default will be UPIO_PORT for ->iotype after
the uart_read_and_validate_port_properties() call. Hence no need
to assign that explicitly. Otherwise it will be UPIO_MEM.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20250124161530.398361-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Wenhong Liu <liu.wenhong35@zte.com.cn>
Signed-off-by: liuqingtao <liu.qingtao2@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@sterling-teng
cpu/SMT: Provide a default topology_is_primary_thread()
d6c837e 
mainline inclusion
from mainline-6.14-rc7
commit 4b455f5
category: feature
bugzilla: RVCK-Project#178

--------------------------------

Currently if architectures want to support HOTPLUG_SMT they need to
provide a topology_is_primary_thread() telling the framework which
thread in the SMT cannot offline. However arm64 doesn't have a
restriction on which thread in the SMT cannot offline, a simplest
choice is that just make 1st thread as the "primary" thread. So
just make this as the default implementation in the framework and
let architectures like x86 that have special primary thread to
override this function (which they've already done).

There's no need to provide a stub function if !CONFIG_SMP or
!CONFIG_HOTPLUG_SMT. In such case the testing CPU is already
the 1st CPU in the SMT so it's always the primary thread.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20250311075143.61078-2-yangyicong@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Rui Gao<gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@sterling-teng
arch_topology: Support SMT control for OF based system
05bec16 
mainline inclusion
from mainline-6.14-rc7
commit 5deb9c7
category: feature
bugzilla: RVCK-Project#178

--------------------------------

On building the topology from the devicetree, we've already gotten the
SMT thread number of each core. Update the largest SMT thread number
and enable the SMT control by the end of topology parsing.

The framework's SMT control provides two interface to the users through
/sys/devices/system/cpu/smt/control
(Documentation/ABI/testing/sysfs-devices-system-cpu):

1) enable SMT by writing "on" and disable by "off"
2) enable SMT by writing max_thread_number or disable by writing 1

Both method support to completely disable/enable the SMT cores so both
work correctly for symmetric SMT platform and asymmetric platform with
non-SMT and one type SMT cores like:

core A: 1 thread
core B: X (X!=1) threads

Note that for a theoretically possible multiple SMT-X (X>1) core
platform the SMT control is also supported as expected but only
by writing the "on/off" method.

Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20250311075143.61078-3-yangyicong@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Rui Gao<gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@sterling-teng
arm64: topology: Support SMT control on ACPI based system
51b2a13 
mainline inclusion
from mainline-6.14-rc7
commit e6b18eb
category: feature
bugzilla: RVCK-Project#178

--------------------------------

For ACPI we'll build the topology from PPTT and we cannot directly
get the SMT number of each core. Instead using a temporary xarray
to record the heterogeneous information (from ACPI_PPTT_ACPI_IDENTICAL)
and SMT information of the first core in its heterogeneous CPU cluster
when building the topology. Then we can know the largest SMT number
in the system. If a homogeneous system's using ACPI 6.2 or later,
all the CPUs should be under the root node of PPTT. There'll be
only one entry in the xarray and all the CPUs in the system will
be assumed identical.

The framework's SMT control provides two interface to the users [1]
through /sys/devices/system/cpu/smt/control
(Documentation/ABI/testing/sysfs-devices-system-cpu):

1) enable SMT by writing "on" and disable by "off"
2) enable SMT by writing max_thread_number or disable by writing 1

Both method support to completely disable/enable the SMT cores so both
work correctly for symmetric SMT platform and asymmetric platform with
non-SMT and one type SMT cores like:

core A: 1 thread
core B: X (X!=1) threads

Note that for a theoretically possible multiple SMT-X (X>1) core
platform the SMT control is also supported as expected but only
by writing the "on/off" method.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Hanjun Guo <guohanjun@huawei.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20250311075143.61078-4-yangyicong@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Rui Gao<gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
@cuiyunhui @sterling-teng
arch_topology: move parse_acpi_topology() to common code
b1d1ba9 
mainline inclusion
from mainline-6.18-rc2
commit 6d0ef68
category: feature
bugzilla: RVCK-Project#178

--------------------------------

Currently, RISC-V lacks arch-specific registers for CPU topology
properties and must get them from ACPI. Thus, parse_acpi_topology()
is moved from arm64/ to drivers/ for RISC-V reuse.

Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://patch.msgid.link/20250923015409.15983-2-cuiyunhui@bytedance.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Rui Gao<gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>
ZhenXing Zhu and others added 12 commits March 11, 2026 06:47
Revert "firmware: thead: c910_aon: add th1520 Aon protocol driver"
1248907 
dist inclusion
category: cleanup
Link: RVCK-Project#227

--------------------------------

This reverts commit 9ff9a08.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "drivers/watchdog: Add THEAD TH1520 pmic watchdog driver"
0f59b75 
dist inclusion
category: cleanup
Link: RVCK-Project#227

--------------------------------

This reverts commit ac83fb1.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "drivers: regulator: add th1520 AON virtual regulator control …
3dfacde 
…support."

dist inclusion
category: cleanup
Link: RVCK-Project#227

--------------------------------

This reverts commit 05f106f.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "add c906 audio support"
4e29d76 
dist inclusion
category: cleanup
Link: RVCK-Project#227

--------------------------------

This reverts commit c2f91cf.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "drivers/soc/event: Add THEAD TH1520 event driver"
6ead7fe 
dist inclusion
category: cleanup
Link: RVCK-Project#227

--------------------------------

This reverts commit 2b271cb.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "regdump:add regdump support for lpi4a and light-a && rename s…
558e708 
…ome dts name from "thead" to "xuantie""

dist inclusion
category: cleanup
Link: RVCK-Project#227

--------------------------------

This reverts commit fbf6833.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
firmware: thead: Add AON firmware protocol driver
3e26bc8 
mainline inclusion
from Linux 7.0-rc3
commit e4b3cbd
category: feature
bugzilla: RVCK-Project#233

--------------------------------

The T-Head TH1520 SoC uses an E902 co-processor running Always-On (AON)
firmware to manage power, clock, and other system resources [1]. This
patch introduces a driver implementing the AON firmware protocol,
allowing the Linux kernel to communicate with the firmware via mailbox
channels.  Through an RPC-based interface, the kernel can initiate power
state transitions, update resource configurations, and perform other
AON-related tasks.

[1]
Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf

Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Acked-by: Drew Fustini <drew@pdp7.com>
Link: https://lore.kernel.org/r/20250311171900.1549916-3-m.wilczynski@samsung.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
pmdomain: thead: Add power-domain driver for TH1520
c6cbc8c 
mainline inclusion
from Linux 7.0-rc3
commit 2bae46e
category: feature
bugzilla: RVCK-Project#233

--------------------------------

The T-Head TH1520 SoC contains multiple power islands that can be
programmatically turned on and off using the AON (Always-On) protocol
and a hardware mailbox [1]. The relevant mailbox driver has already been
merged into the mainline kernel in commit 5d4d263 ("mailbox:
Introduce support for T-head TH1520 Mailbox driver");

Introduce a power-domain driver for the TH1520 SoC, which is using AON
firmware protocol to communicate with E902 core through the hardware
mailbox. This way it can send power on/off commands to the E902 core.

The interaction with AUDIO power island e.g trying to turn it OFF proved
to crash the firmware running on the E902 core. Introduce the workaround
to disable interacting with the power island.

[1]
Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf

Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Acked-by: Drew Fustini <drew@pdp7.com>
Link: https://lore.kernel.org/r/20250311171900.1549916-5-m.wilczynski@samsung.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@arndb
pmdomain: thead: fix TH1520_AON_PROTOCOL dependency
53682b9 
mainline inclusion
from Linux 7.0-rc3
commit 6ec7c4a
category: feature
bugzilla: RVCK-Project#233

Kconfig treats the dependency as optional, but the header file only provides
normal declarations and no empty API stubs:

ld: fs/btrfs/extent_io.o: in function `writepage_delalloc':
extent_io.c:(.text+0x2b42): undefined reference to `__udivdi3'
ld: drivers/pmdomain/thead/th1520-pm-domains.o: in function `th1520_pd_power_off':
th1520-pm-domains.c:(.text+0x57): undefined reference to `th1520_aon_power_update'
ld: drivers/pmdomain/thead/th1520-pm-domains.o: in function `th1520_pd_power_on':
th1520-pm-domains.c:(.text+0x8a): undefined reference to `th1520_aon_power_update'
ld: drivers/pmdomain/thead/th1520-pm-domains.o: in function `th1520_pd_probe':
th1520-pm-domains.c:(.text+0xb8): undefined reference to `th1520_aon_init'
ld: th1520-pm-domains.c:(.text+0x1c6): undefined reference to `th1520_aon_power_update'

Since the firmware code can easily be enabled for compile testing, there
is no need to add stubs either, so just make it a hard dependency.

Fixes: dc9a897 ("pmdomain: thead: Add power-domain driver for TH1520")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Michal Wilczynski <m.wilczynski@samsung.com>
Link: https://lore.kernel.org/r/20250314154834.4053416-1-arnd@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@storulf
pmdomain: Prepare to move Kconfig files into the pmdomain subsystem
80a55dd 
mainline inclusion
from Linux 7.0-rc3
commit d149718
category: feature
bugzilla: RVCK-Project#233

--------------------------------

Rather than having the various Kconfig files for the genpd providers
sprinkled across subsystems, let's prepare to move them into the pmdomain
subsystem along with the implementations.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
dt-bindings: power: Add TH1520 SoC power domains
f0e8d0b 
mainline inclusion
from Linux 7.0-rc3
commit 0c54b63
category: feature
bugzilla: RVCK-Project#233

--------------------------------

Add power domain ID's for the TH1520 SoC power domains.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Acked-by: Drew Fustini <drew@pdp7.com>
Link: https://lore.kernel.org/r/20250311171900.1549916-4-m.wilczynski@samsung.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@krzk
pmdomain: core: constify of_phandle_args in xlate
819e8d5 
mainline inclusion
from Linux 7.0-rc3
commit 4d08246
category: feature
bugzilla: RVCK-Project#233

--------------------------------

The xlate callbacks are supposed to translate of_phandle_args to proper
provider without modifying the of_phandle_args.  Make the argument
pointer to const for code safety and readability.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240208202822.631449-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@github-actions
Copy link
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github-actions bot commented Mar 12, 2026 •
edited
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/22991524791

参数解析结果
args value
repository RVCK-Project/rvck
head ref pull/238/head
base ref rvck-6.6
LAVA repo RVCK-Project/lavaci
LAVA Template lava-job-template/qemu/qemu-ltp.yaml
Testcase path lava-testcases/common-test/ltp/ltp.yaml
need run job kunit-test,kernel-build,check-patch,lava-trigger

测试完成

详细结果:

RVCK result

check result
kunit-test success
kernel-build success
lava-trigger success
check-patch success

Kunit Test Result

[07:45:07] Testing complete. Ran 457 tests: passed: 445, skipped: 12

Kernel Build Result

Kernel build succeeded: RVCK-Project/rvck/238/

06d578d0f7760d76d5ec4b93bee6019f /srv/guix_result/bf65b586b5302cb1f91176e50842542357a26408/Image
522516612b45236e239f2080ead62195 /root/initramfs.img

LAVA Check

args:

result:

Lava check done! lava log: https://lava.oerv.ac.cn/scheduler/job/1492

lava result count: [fail]: 173, [pass]: 1436, [skip]: 290

Check Patch Result
Total Errors 0
Total Warnings 373

Michal Wilczynski and others added 12 commits March 12, 2026 08:20
riscv: dts: thead: Introduce power domain nodes with aon firmware
f3469dd 
The DRM Imagination GPU requires a power-domain driver. In the T-HEAD
TH1520 SoC implements power management capabilities through the E902
core, which can be communicated with through the mailbox, using firmware
protocol.

Add AON node, which servers as a power-domain controller.

Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Reviewed-by: Drew Fustini <drew@pdp7.com>
Signed-off-by: Drew Fustini <drew@pdp7.com>
Revert "audio: th1520: to support tdm/spdif feature"
311800d 
dist inclusion

category: cleanup
Link: RVCK-Project#235

--------------------------------

This reverts commit 8297afc.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "dts: audio: to support i2s-8ch feature"
faa9ff3 
dist inclusion

category: cleanup
Link: RVCK-Project#235

--------------------------------

This reverts commit a7bf54d.
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "audio: th1520: add tdm driver for XuanTie TH1520 SoC"
b90d052 
dist inclusion

category: cleanup
Link: RVCK-Project#235

--------------------------------

This reverts commit 44dc885.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "i2s: add i2s driver for XuanTie TH1520 SoC"
812d289 
dist inclusion

category: cleanup
Link: RVCK-Project#235

--------------------------------

This reverts commit d0c9470.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "reset: th1520: to support npu/fce reset feature"
899e3cb 
dist inclusion

category: cleanup
Link: RVCK-Project#235

--------------------------------

This reverts commit 2e4869d.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "reset: Add th1520 reset driver support"
54c65ec 
dist inclusion

category: cleanup
Link: RVCK-Project#235

--------------------------------

This reverts commit 61085f0.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "dt-bindings: reset: Document th1520 reset control"
363358d 
dist inclusion

category: cleanup
Link: RVCK-Project#235

--------------------------------

This reverts commit f57b43b.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Revert "riscv:dts:thead: Add TH1520 event and watchdog device node"
b99a5d0 
dist inclusion

category: cleanup
Link: RVCK-Project#235

--------------------------------

This reverts commit 9898f99.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
dt-bindings: reset: Add T-HEAD TH1520 SoC Reset Controller
4be13ae 
mainline inclusion
from Linux 7.0-rc3
commit 30e7573
category: feature
bugzilla: RVCK-Project#236

--------------------------------

Add a YAML schema for the T-HEAD TH1520 SoC reset controller. This
controller manages resets for subsystems such as the GPU within the
TH1520 SoC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Link: https://lore.kernel.org/r/20250303152511.494405-2-m.wilczynski@samsung.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
reset: thead: Add TH1520 reset controller driver
95a5436 
mainline inclusion
from Linux 7.0-rc3
commit 4a65326
category: feature
bugzilla: RVCK-Project#236

--------------------------------

Add reset controller driver for the T-HEAD TH1520 SoC that manages
hardware reset lines for various subsystems. The driver currently
implements support for GPU reset control, with infrastructure in place
to extend support for NPU and Watchdog Timer resets in future updates.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Link: https://lore.kernel.org/r/20250303152511.494405-3-m.wilczynski@samsung.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
riscv: dts: thead: th1520: Add GPU clkgen reset to AON node
0b7ded6 
mainline inclusion
from Linux 7.0-rc3
commit cf5e81d
category: feature
bugzilla: RVCK-Project#236

--------------------------------

Add the "gpu-clkgen" reset property to the AON device tree node. This
allows the AON power domain driver to detect the capability to power
sequence the GPU and spawn the necessary pwrseq-thead-gpu auxiliary
driver for managing the GPU's complex power sequence.

This commit also adds the prerequisite
dt-bindings/reset/thead,th1520-reset.h include to make the
TH1520_RESET_ID_GPU_CLKGEN available. This include was previously
dropped during a conflict resolution [1].

Link: https://lore.kernel.org/all/aAvfn2mq0Ksi8DF2@x1/ [1]

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Drew Fustini <drew@pdp7.com>
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Signed-off-by: Drew Fustini <drew@pdp7.com>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
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github-actions bot commented Mar 13, 2026 •
edited
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/23033115253

参数解析结果
args value
repository RVCK-Project/rvck
head ref pull/238/head
base ref rvck-6.6
LAVA repo RVCK-Project/lavaci
LAVA Template lava-job-template/qemu/qemu-ltp.yaml
Testcase path lava-testcases/common-test/ltp/ltp.yaml
need run job kunit-test,kernel-build,check-patch,lava-trigger

测试完成

详细结果:

RVCK result

check result
kunit-test success
kernel-build success
lava-trigger success
check-patch success

Kunit Test Result

[02:17:29] Testing complete. Ran 457 tests: passed: 445, skipped: 12

Kernel Build Result

Kernel build succeeded: RVCK-Project/rvck/238/

b135dcfa92614efcbed3955d984ea34a /srv/guix_result/0b7ded6070db389398900763b88e828edb994d9d/Image
70342ab07f00a8462c88af9e158571ca /root/initramfs.img

LAVA Check

args:

result:

Lava check done! lava log: https://lava.oerv.ac.cn/scheduler/job/1495

lava result count: [fail]: 174, [pass]: 1435, [skip]: 290

Check Patch Result
Total Errors 0
Total Warnings 375

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sterling-teng commented Mar 26, 2026

集成测试发现，该pr与237号pr冲突。

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