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NilaknaW/README.md

👋 Hi, I’m Nilakna

👩‍💻 About Me :

  • 🌱 I’m currently an undergraduate in electronics and telecommunication engineering.
  • 🤖 Interests: Electronics, robotics, and machine learning.
  • ⚡ Fun fact: I love playing piano and clarinet.
  • 🔗 View my profile here

🔥 My Stats :

GitHub Streak

Top Langs

🛠️ Languages and Tools :

Web and Mobile Electronics Programming
Flutter Arduino Python
Firebase Solidworks C++
Unity LTSpice Matlab

📫 How to reach me:

🚀 Projects:

  • GreetFlood: Flutter app with Unity AR feature for NBS methods. (World Wildlife Fund)
  • ALPR: Automatic license plate recognition with computer vision and deep learning in real time. (SLT Mobitel)
  • NutriMithu: Flutter app for healthy diet planning for Sri Lanka and Diet box CAD. Repository Link
  • SmartGlow: Electronics project of IoT smart bulb adapter.
  • RightVote: Flutter web app with AI chatbot for election prediction. Web App repo Project Repo
  • TransmittixApp: App for communicating between two computers using BladeRf antennas and RTL-SDR. It can transmit audio, video, and images and features a live chat. Repo Link
  • Reconfigurable End Effector: A robotic end effector for depalletization in supermarket logistics. Repository
  • Low-power op-amp: IC design of an op-amp with Sky130 PDK and tinytapeout submission for fabrication. Repository
Flutter  Firebase 

Pinned Loading

  1. sky130_op_amp sky130_op_amp Public

    Forked from PravinduG/sky130_op_amp

    Low-power Op-Amp analog IC design using Sky130 PDK

    1

  2. SmartGlow SmartGlow Public

    Smart bulb adapter. Connect bulbs to internet seamlessly.

    JavaScript

  3. Glyco-iQ-App Glyco-iQ-App Public

    Mobile app of non-invasive glucometer project

    Dart

  4. nutrimithu_v2 nutrimithu_v2 Public

    Electronic product development of NutriMithu healthy meal app project.

    C++

  5. matmul matmul Public

    matrix multiplier unit in {system}Verilog for Edge-QLoRA

    SystemVerilog 1

  6. uart-systemverilog uart-systemverilog Public

    UART implementation on FPGA using System Verilog

    SystemVerilog