Pinned Loading
-
MIPS_Logisim
MIPS_Logisim PublicThis project showcases the complete implementation of a Single-Cycle MIPS CPU, built around a simplified MIPS architecture.
-
Stop-Watch-ATMega32
Stop-Watch-ATMega32 PublicThis project showcases the complete implementation of a Stop Watch system using the ATMega32 microcontroller.
C
-
Smart_Home
Smart_Home PublicThis project showcases the complete implementation of a Smart Home system using the ATMega32 microcontroller
C
-
Level-1-Calculator
Level-1-Calculator PublicThis is a simple level 1 calculator embedded project using atmega32 microcontroller
C
-
-
UART-Verilog
UART-Verilog PublicForked from Ahmed-Khaled-L/UART
RTL Design for the UART Communication protocol - fully configurable version
Verilog
If the problem persists, check the GitHub status page or contact support.
