Name		Name	Last commit message	Last commit date
parent directory ..
README.md		README.md
fullAdder.v		fullAdder.v
fullAdder_tb.v		fullAdder_tb.v
half_adder.v		half_adder.v
half_adder_tb.v		half_adder_tb.v

README.md

Code

Semiconductor intellectual property core
VHDL repositories
- VHDL repository by Dr. Furkan Çayci of Gebze Technical University
- VHDL examples by Prof. Ramin Roosta of California State University, Northridge (CSUN)
- VHDL examples by Lauri Võsandi
Verilog repositories
- Verilog for Beginners
SystemVerilog repositories
- SystemVerilog design by Stuart Sutherland
- SystemVerilog examples by Jeff DeCola
- SystemVerilog examples by Deepak Kumar Tala
- SystemVerilog tutorial
- SystemVerilog testbench examples
OpenCores
- opencores.org
Free Range Factory IP Cores
- Arithmetic core
- Prototype board
- Communication controller
- Coprocessor
- Crypto core
- Digital signal processor (DSP) core
- Error correction code (ECC) core
- Library
- Memory core
- Other
- Processor
- System on a chip (SoC)
- System on module (SOM)
- System controller
- Testing/verification
- Video controller