qucs/ROADMAP at develop · Qucs/qucs · GitHub

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
ROADMAP for Qucs, after 0.0.20

Traditionally, Qucs has been a schematic editor with simulation capabilities.
The focus of Qucs remains circuit modelling, but without the limitations to a
prescribed simulator. The highest priority is the decoupling of schematic entry
and simulation. For this, we refactor Qucs to use a tool agnostic and neutral
circuit representation internally, guided by and compatible with an industry
standard.

Qucs now has initial support for a file format based on the structural subset
of Verilog, enabling schematic data exchange. The file format complies with the
IEEE1364 industry standard. It is understood by Icarus-Verilog and Gnucap, and
any other compliant tool. See [0, 1] for details.

Different tools may now use different device models for different purposes,
e.g. [2-4], without the need to replace the circuit. The immedate next step
will be to upgrade the device library file format [5].

The simulate button relies on obsolete legacy code. It produces a flattened
incomplete circuit representation that only works with Qucsator/Gnucsator.
Generic use of circuits in other tools is fully working, way beyond the
simulate button, but not currently automated. The approach is outlined in
examples/helloworld, based on ad-hoc device libraries.

Some refactoring of the Qucs internals is in progress. We are working to fix
long standing issues and add new possibilities. Our high level goals include

- support user defined parameters and attributes on GUI level,
- allow "rat nets" and implicit connectivity,
- enable typed nodes aka disciplines and mixed signal modelling and,
- import schematics drawn with other tools.
- a future proof "simulate" button or interactive simulation

See TODO for a more detailed view.

[0] http://gnucap.org/dokuwiki/doku.php/gnucap:user:netlist_import_and_export
[1] http://gnucap.org/dokuwiki/doku.php/gnucap:user:netlist_import_and_export:qucs
[2] https://git.savannah.gnu.org/cgit/gnucap/gnucap-modelgen-verilog.git/tree/vams?h=develop
[3] e.g. CMC models
[4] https://git.savannah.gnu.org/cgit/gnucap/gnucap-modelgen-verilog.git/tree/examples?h=develop
[5] https://github.com/Qucs/qucs/issues/1100