Large and overlapping UIO devices?

[dgastler]

A drawback to the current design of UIOuHAL is that axi endpoints are mapped via the UIO linux driver and the software requires UIO devices to live at the TOP level of the uHAL address table.
This limitation can be annoying and one possible solution is to build a UIO device that maps all(or a subset) of axi endpoints into one UIO memory map.

TODO:

• see if there are any problems with large UIO maps
• See if overlapping memory maps are a problem (leaving the old way working, but allowing for one global map as well)
• How would this be implemented in the FPGA/Zynq build systems.