From 0df0b8aa0f3063e7995e7f709f627011181c09cd Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 16 Dec 2016 18:18:34 +0500 Subject: [PATCH 01/49] generic: rtl8367b: fix code format Fix indentation and remove superfluous linebreaks. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 99 +++++++++---------- 1 file changed, 49 insertions(+), 50 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index a73e35ed2d1c..39ccb21b3c61 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -43,7 +43,7 @@ #define RTL8367B_TA_CTRL_REG 0x0500 /*GOOD*/ #define RTL8367B_TA_CTRL_SPA_SHIFT 8 #define RTL8367B_TA_CTRL_SPA_MASK 0x7 -#define RTL8367B_TA_CTRL_METHOD BIT(4)/*GOOD*/ +#define RTL8367B_TA_CTRL_METHOD BIT(4) /*GOOD*/ #define RTL8367B_TA_CTRL_CMD_SHIFT 3 #define RTL8367B_TA_CTRL_CMD_READ 0 #define RTL8367B_TA_CTRL_CMD_WRITE 1 @@ -59,12 +59,12 @@ ((RTL8367B_TA_CTRL_CMD_WRITE << RTL8367B_TA_CTRL_CMD_SHIFT) | \ RTL8367B_TA_CTRL_TABLE_CVLAN) -#define RTL8367B_TA_ADDR_REG 0x0501/*GOOD*/ -#define RTL8367B_TA_ADDR_MASK 0x3fff/*GOOD*/ +#define RTL8367B_TA_ADDR_REG 0x0501 /*GOOD*/ +#define RTL8367B_TA_ADDR_MASK 0x3fff /*GOOD*/ -#define RTL8367B_TA_LUT_REG 0x0502/*GOOD*/ +#define RTL8367B_TA_LUT_REG 0x0502 /*GOOD*/ -#define RTL8367B_TA_WRDATA_REG(_x) (0x0510 + (_x))/*GOOD*/ +#define RTL8367B_TA_WRDATA_REG(_x) (0x0510 + (_x)) /*GOOD*/ #define RTL8367B_TA_VLAN_NUM_WORDS 2 #define RTL8367B_TA_VLAN_VID_MASK RTL8367B_VID_MASK #define RTL8367B_TA_VLAN0_MEMBER_SHIFT 0 @@ -74,7 +74,7 @@ #define RTL8367B_TA_VLAN1_FID_SHIFT 0 #define RTL8367B_TA_VLAN1_FID_MASK RTL8367B_FID_MASK -#define RTL8367B_TA_RDDATA_REG(_x) (0x0520 + (_x))/*GOOD*/ +#define RTL8367B_TA_RDDATA_REG(_x) (0x0520 + (_x)) /*GOOD*/ #define RTL8367B_VLAN_PVID_CTRL_REG(_p) (0x0700 + (_p) / 2) /*GOOD*/ #define RTL8367B_VLAN_PVID_CTRL_MASK 0x1f /*GOOD*/ @@ -82,12 +82,12 @@ #define RTL8367B_VLAN_MC_BASE(_x) (0x0728 + (_x) * 4) /*GOOD*/ #define RTL8367B_VLAN_MC_NUM_WORDS 4 /*GOOD*/ -#define RTL8367B_VLAN_MC0_MEMBER_SHIFT 0/*GOOD*/ -#define RTL8367B_VLAN_MC0_MEMBER_MASK RTL8367B_MEMBER_MASK/*GOOD*/ -#define RTL8367B_VLAN_MC1_FID_SHIFT 0/*GOOD*/ -#define RTL8367B_VLAN_MC1_FID_MASK RTL8367B_FID_MASK/*GOOD*/ -#define RTL8367B_VLAN_MC3_EVID_SHIFT 0/*GOOD*/ -#define RTL8367B_VLAN_MC3_EVID_MASK RTL8367B_VID_MASK/*GOOD*/ +#define RTL8367B_VLAN_MC0_MEMBER_SHIFT 0 /*GOOD*/ +#define RTL8367B_VLAN_MC0_MEMBER_MASK RTL8367B_MEMBER_MASK /*GOOD*/ +#define RTL8367B_VLAN_MC1_FID_SHIFT 0 /*GOOD*/ +#define RTL8367B_VLAN_MC1_FID_MASK RTL8367B_FID_MASK /*GOOD*/ +#define RTL8367B_VLAN_MC3_EVID_SHIFT 0 /*GOOD*/ +#define RTL8367B_VLAN_MC3_EVID_MASK RTL8367B_VID_MASK /*GOOD*/ #define RTL8367B_VLAN_CTRL_REG 0x07a8 /*GOOD*/ #define RTL8367B_VLAN_CTRL_ENABLE BIT(0) @@ -108,8 +108,8 @@ #define RTL8367B_MIB_CTRL0_RESET_MASK BIT(1) /*GOOD*/ #define RTL8367B_MIB_CTRL0_BUSY_MASK BIT(0) /*GOOD*/ -#define RTL8367B_SWC0_REG 0x1200/*GOOD*/ -#define RTL8367B_SWC0_MAX_LENGTH_SHIFT 13/*GOOD*/ +#define RTL8367B_SWC0_REG 0x1200 /*GOOD*/ +#define RTL8367B_SWC0_MAX_LENGTH_SHIFT 13 /*GOOD*/ #define RTL8367B_SWC0_MAX_LENGTH(_x) ((_x) << 13) /*GOOD*/ #define RTL8367B_SWC0_MAX_LENGTH_MASK RTL8367B_SWC0_MAX_LENGTH(0x3) #define RTL8367B_SWC0_MAX_LENGTH_1522 RTL8367B_SWC0_MAX_LENGTH(0) @@ -117,17 +117,17 @@ #define RTL8367B_SWC0_MAX_LENGTH_1552 RTL8367B_SWC0_MAX_LENGTH(2) #define RTL8367B_SWC0_MAX_LENGTH_16000 RTL8367B_SWC0_MAX_LENGTH(3) -#define RTL8367B_CHIP_NUMBER_REG 0x1300/*GOOD*/ +#define RTL8367B_CHIP_NUMBER_REG 0x1300 /*GOOD*/ -#define RTL8367B_CHIP_VER_REG 0x1301/*GOOD*/ -#define RTL8367B_CHIP_VER_RLVID_SHIFT 12/*GOOD*/ -#define RTL8367B_CHIP_VER_RLVID_MASK 0xf/*GOOD*/ -#define RTL8367B_CHIP_VER_MCID_SHIFT 8/*GOOD*/ -#define RTL8367B_CHIP_VER_MCID_MASK 0xf/*GOOD*/ -#define RTL8367B_CHIP_VER_BOID_SHIFT 4/*GOOD*/ -#define RTL8367B_CHIP_VER_BOID_MASK 0xf/*GOOD*/ -#define RTL8367B_CHIP_VER_AFE_SHIFT 0/*GOOD*/ -#define RTL8367B_CHIP_VER_AFE_MASK 0x1/*GOOD*/ +#define RTL8367B_CHIP_VER_REG 0x1301 /*GOOD*/ +#define RTL8367B_CHIP_VER_RLVID_SHIFT 12 /*GOOD*/ +#define RTL8367B_CHIP_VER_RLVID_MASK 0xf /*GOOD*/ +#define RTL8367B_CHIP_VER_MCID_SHIFT 8 /*GOOD*/ +#define RTL8367B_CHIP_VER_MCID_MASK 0xf /*GOOD*/ +#define RTL8367B_CHIP_VER_BOID_SHIFT 4 /*GOOD*/ +#define RTL8367B_CHIP_VER_BOID_MASK 0xf /*GOOD*/ +#define RTL8367B_CHIP_VER_AFE_SHIFT 0 /*GOOD*/ +#define RTL8367B_CHIP_VER_AFE_MASK 0x1 /*GOOD*/ #define RTL8367B_CHIP_MODE_REG 0x1302 #define RTL8367B_CHIP_MODE_MASK 0x7 @@ -169,18 +169,18 @@ #define RTL8367B_PORT_STATUS_REG(_p) (0x1352 + (_p)) /*GOOD*/ #define RTL8367B_PORT_STATUS_EN_1000_SPI BIT(11) /*GOOD*/ -#define RTL8367B_PORT_STATUS_EN_100_SPI BIT(10)/*GOOD*/ -#define RTL8367B_PORT_STATUS_NWAY_FAULT BIT(9)/*GOOD*/ -#define RTL8367B_PORT_STATUS_LINK_MASTER BIT(8)/*GOOD*/ -#define RTL8367B_PORT_STATUS_NWAY BIT(7)/*GOOD*/ -#define RTL8367B_PORT_STATUS_TXPAUSE BIT(6)/*GOOD*/ -#define RTL8367B_PORT_STATUS_RXPAUSE BIT(5)/*GOOD*/ -#define RTL8367B_PORT_STATUS_LINK BIT(4)/*GOOD*/ -#define RTL8367B_PORT_STATUS_DUPLEX BIT(2)/*GOOD*/ -#define RTL8367B_PORT_STATUS_SPEED_MASK 0x0003/*GOOD*/ -#define RTL8367B_PORT_STATUS_SPEED_10 0/*GOOD*/ -#define RTL8367B_PORT_STATUS_SPEED_100 1/*GOOD*/ -#define RTL8367B_PORT_STATUS_SPEED_1000 2/*GOOD*/ +#define RTL8367B_PORT_STATUS_EN_100_SPI BIT(10) /*GOOD*/ +#define RTL8367B_PORT_STATUS_NWAY_FAULT BIT(9) /*GOOD*/ +#define RTL8367B_PORT_STATUS_LINK_MASTER BIT(8) /*GOOD*/ +#define RTL8367B_PORT_STATUS_NWAY BIT(7) /*GOOD*/ +#define RTL8367B_PORT_STATUS_TXPAUSE BIT(6) /*GOOD*/ +#define RTL8367B_PORT_STATUS_RXPAUSE BIT(5) /*GOOD*/ +#define RTL8367B_PORT_STATUS_LINK BIT(4) /*GOOD*/ +#define RTL8367B_PORT_STATUS_DUPLEX BIT(2) /*GOOD*/ +#define RTL8367B_PORT_STATUS_SPEED_MASK 0x0003 /*GOOD*/ +#define RTL8367B_PORT_STATUS_SPEED_10 0 /*GOOD*/ +#define RTL8367B_PORT_STATUS_SPEED_100 1 /*GOOD*/ +#define RTL8367B_PORT_STATUS_SPEED_1000 2 /*GOOD*/ #define RTL8367B_RTL_MAGIC_ID_REG 0x13c2 #define RTL8367B_RTL_MAGIC_ID_VAL 0x0249 @@ -575,8 +575,8 @@ static const struct rtl8367b_initval rtl8367r_vb_initvals_1[] = { }; static int rtl8367b_write_initvals(struct rtl8366_smi *smi, - const struct rtl8367b_initval *initvals, - int count) + const struct rtl8367b_initval *initvals, + int count) { int err; int i; @@ -588,7 +588,7 @@ static int rtl8367b_write_initvals(struct rtl8366_smi *smi, } static int rtl8367b_read_phy_reg(struct rtl8366_smi *smi, - u32 phy_addr, u32 phy_reg, u32 *val) + u32 phy_addr, u32 phy_reg, u32 *val) { int timeout; u32 data; @@ -635,7 +635,7 @@ static int rtl8367b_read_phy_reg(struct rtl8366_smi *smi, } static int rtl8367b_write_phy_reg(struct rtl8366_smi *smi, - u32 phy_addr, u32 phy_reg, u32 val) + u32 phy_addr, u32 phy_reg, u32 val) { int timeout; u32 data; @@ -818,7 +818,7 @@ static int rtl8367b_extif_set_force(struct rtl8366_smi *smi, int id, } static int rtl8367b_extif_set_rgmii_delay(struct rtl8366_smi *smi, int id, - unsigned txdelay, unsigned rxdelay) + unsigned txdelay, unsigned rxdelay) { u32 mask; u32 val; @@ -1122,7 +1122,7 @@ static int rtl8367b_set_vlan_mc(struct rtl8366_smi *smi, u32 index, RTL8367B_VLAN_MC1_FID_SHIFT; data[2] = 0; data[3] = (vlanmc->vid & RTL8367B_VLAN_MC3_EVID_MASK) << - RTL8367B_VLAN_MC3_EVID_SHIFT; + RTL8367B_VLAN_MC3_EVID_SHIFT; for (i = 0; i < ARRAY_SIZE(data); i++) REG_WR(smi, RTL8367B_VLAN_MC_BASE(index) + i, data[i]); @@ -1204,8 +1204,8 @@ static int rtl8367b_sw_reset_mibs(struct switch_dev *dev, } static int rtl8367b_sw_get_port_link(struct switch_dev *dev, - int port, - struct switch_port_link *link) + int port, + struct switch_port_link *link) { struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); u32 data = 0; @@ -1245,8 +1245,8 @@ static int rtl8367b_sw_get_port_link(struct switch_dev *dev, } static int rtl8367b_sw_get_max_length(struct switch_dev *dev, - const struct switch_attr *attr, - struct switch_val *val) + const struct switch_attr *attr, + struct switch_val *val) { struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); u32 data; @@ -1259,8 +1259,8 @@ static int rtl8367b_sw_get_max_length(struct switch_dev *dev, } static int rtl8367b_sw_set_max_length(struct switch_dev *dev, - const struct switch_attr *attr, - struct switch_val *val) + const struct switch_attr *attr, + struct switch_val *val) { struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); u32 max_len; @@ -1510,7 +1510,7 @@ static struct rtl8366_smi_ops rtl8367b_smi_ops = { .enable_port = rtl8367b_enable_port, }; -static int rtl8367b_probe(struct platform_device *pdev) +static int rtl8367b_probe(struct platform_device *pdev) { struct rtl8366_smi *smi; int err; @@ -1599,4 +1599,3 @@ MODULE_DESCRIPTION("Realtek RTL8367B ethernet switch driver"); MODULE_AUTHOR("Gabor Juhos "); MODULE_LICENSE("GPL v2"); MODULE_ALIAS("platform:" RTL8367B_DRIVER_NAME); - From 4034c3aa6f49a20c02656b7ca2f76988a0965ad1 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 10 Feb 2017 12:37:53 +0500 Subject: [PATCH 02/49] generic: rtl8366_smi/rtl8367b: update chip detection Extend rtl8366_smi with chip_ver field for storing chip ID. Useful for drivers supporting multiple chip versions. Replace method calls with macro. Receive chip number and mode only if detection error occured. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../files/drivers/net/phy/rtl8366_smi.h | 1 + .../generic/files/drivers/net/phy/rtl8367b.c | 43 +++++++------------ 2 files changed, 17 insertions(+), 27 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h index bd41385bed1a..1100b3d21edf 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h @@ -41,6 +41,7 @@ struct rtl8366_smi { struct mii_bus *mii_bus; int mii_irq[PHY_MAX_ADDR]; struct switch_dev sw_dev; + unsigned int chip_ver; unsigned int cpu_port; unsigned int num_ports; diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 39ccb21b3c61..3e240ac5aa3e 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -1443,41 +1443,28 @@ static int rtl8367b_detect(struct rtl8366_smi *smi) u32 chip_num; u32 chip_ver; u32 chip_mode; - int ret; - - /* TODO: improve chip detection */ - rtl8366_smi_write_reg(smi, RTL8367B_RTL_MAGIC_ID_REG, - RTL8367B_RTL_MAGIC_ID_VAL); + int err; - ret = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_NUMBER_REG, &chip_num); - if (ret) { - dev_err(smi->parent, "unable to read %s register\n", - "chip number"); - return ret; - } + REG_WR(smi, RTL8367B_RTL_MAGIC_ID_REG, RTL8367B_RTL_MAGIC_ID_VAL); - ret = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_VER_REG, &chip_ver); - if (ret) { + err = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_VER_REG, &chip_ver); + if (err) { dev_err(smi->parent, "unable to read %s register\n", "chip version"); - return ret; - } - - ret = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_MODE_REG, &chip_mode); - if (ret) { - dev_err(smi->parent, "unable to read %s register\n", - "chip mode"); - return ret; + return err; } switch (chip_ver) { - case 0x1000: - chip_name = "8367RB"; - break; - case 0x1010: - chip_name = "8367R-VB"; - break; + case 0x1000: + chip_name = "8367RB"; + break; + case 0x1010: + chip_name = "8367R-VB"; + break; default: + REG_RD(smi, RTL8367B_CHIP_NUMBER_REG, &chip_num); + REG_RD(smi, RTL8367B_CHIP_MODE_REG, &chip_mode); + dev_err(smi->parent, "unknown chip num:%04x ver:%04x, mode:%04x\n", chip_num, chip_ver, chip_mode); @@ -1486,6 +1473,8 @@ static int rtl8367b_detect(struct rtl8366_smi *smi) dev_info(smi->parent, "RTL%s chip found\n", chip_name); + smi->chip_ver = chip_ver; + return 0; } From 75c423f4962116254d806084d504d019ed6ed5bc Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 10 Feb 2017 12:45:03 +0500 Subject: [PATCH 03/49] generic: rtl8367b: add cpu port detect depending on external port On chip present 2 ports, set CPU port id depending on which external port is configured. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8367b.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 3e240ac5aa3e..014066c230bd 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -857,6 +857,8 @@ static int rtl8367b_extif_init(struct rtl8366_smi *smi, int id, cfg->rxdelay); if (err) return err; + + smi->cpu_port = RTL8367B_CPU_PORT_NUM + id; } return 0; @@ -1390,7 +1392,7 @@ static int rtl8367b_switch_init(struct rtl8366_smi *smi) int err; dev->name = "RTL8367B"; - dev->cpu_port = RTL8367B_CPU_PORT_NUM; + dev->cpu_port = smi->cpu_port; dev->ports = RTL8367B_NUM_PORTS; dev->vlans = RTL8367B_NUM_VIDS; dev->ops = &rtl8367b_sw_ops; From e6d2c12acd3136d5900e0619791cfadb1741827f Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 10 Feb 2017 12:58:34 +0500 Subject: [PATCH 04/49] generic: rtl8367b: map external ports Driver supports 2 chip versions: RTL8367RB, RTL8367R-VB. Each of them has 2 external ports. RTL8367RB has ports indexed as #1,#2 (PHY #6, #7). RTL8367R-VB has ports indexed as #0,#1 (PHY #5,#6). Map ports so that extif0 complies to external port 0 or 1 depending on chip ID. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8367b.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 014066c230bd..0d19a2bc44e8 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -844,6 +844,10 @@ static int rtl8367b_extif_init(struct rtl8366_smi *smi, int id, mode = (cfg) ? cfg->mode : RTL8367_EXTIF_MODE_DISABLED; + /* Map external port ID. V-RB has ext ports: 0,1; RB: 1,2 */ + if (smi->chip_ver == 0x1000) + id++; + err = rtl8367b_extif_set_mode(smi, id, mode); if (err) return err; From 798aa22da382c7acc7b1bb61cc8081e17dd69c4c Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 10 Feb 2017 09:03:04 +0500 Subject: [PATCH 05/49] generic: rtl8367b: fix and improve initvals write Previously rlvid was wrongly converted and for different chip (0x1000, 0x1010) it was equal 1 what caused loading improper values to RTL8367RB switch. Load initvals depending on raw chip ID. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 33 +++++++------------ 1 file changed, 12 insertions(+), 21 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 0d19a2bc44e8..d4814e39ffa1 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -685,31 +685,22 @@ static int rtl8367b_write_phy_reg(struct rtl8366_smi *smi, static int rtl8367b_init_regs(struct rtl8366_smi *smi) { const struct rtl8367b_initval *initvals; - u32 chip_ver; - u32 rlvid; int count; - int err; - - REG_WR(smi, RTL8367B_RTL_MAGIC_ID_REG, RTL8367B_RTL_MAGIC_ID_VAL); - REG_RD(smi, RTL8367B_CHIP_VER_REG, &chip_ver); - rlvid = (chip_ver >> RTL8367B_CHIP_VER_RLVID_SHIFT) & - RTL8367B_CHIP_VER_RLVID_MASK; - - switch (rlvid) { - case 0: - initvals = rtl8367r_vb_initvals_0; - count = ARRAY_SIZE(rtl8367r_vb_initvals_0); - break; + switch (smi->chip_ver) { + case 0x1000: + initvals = rtl8367r_vb_initvals_0; + count = ARRAY_SIZE(rtl8367r_vb_initvals_0); + break; - case 1: - initvals = rtl8367r_vb_initvals_1; - count = ARRAY_SIZE(rtl8367r_vb_initvals_1); - break; + case 0x1010: + initvals = rtl8367r_vb_initvals_1; + count = ARRAY_SIZE(rtl8367r_vb_initvals_1); + break; - default: - dev_err(smi->parent, "unknow rlvid %u\n", rlvid); - return -ENODEV; + default: + dev_err(smi->parent, "unknown chip %u\n", smi->chip_ver); + return -ENODEV; } /* TODO: disable RLTP */ From b8dc76448f7d43c6061166bb09641a77d763bf02 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Sun, 19 Feb 2017 13:27:39 +0500 Subject: [PATCH 06/49] generic: rtl8367b: avoid isolation for nonexistent ports On RTL8367R-VB/RB chips present 2 external ports of maximum 3. Port #7 works in RGMII mode only and present only on RTL8367RB. Ports are numbered sequentially and so port #5 must be avoided as only ports 0-4,6,7 are present on board. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8367b.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index d4814e39ffa1..c439bf16a4ee 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -1148,6 +1148,17 @@ static int rtl8367b_set_mc_index(struct rtl8366_smi *smi, int port, int index) if (port >= RTL8367B_NUM_PORTS || index >= RTL8367B_NUM_VLANS) return -EINVAL; + // Skip nonexistent ports + switch (smi->chip_ver) { + case 0x1000: + if (port == 5) return 0; + break; + + case 0x1010: + if (port == 7) return 0; + break; + } + return rtl8366_smi_rmwr(smi, RTL8367B_VLAN_PVID_CTRL_REG(port), RTL8367B_VLAN_PVID_CTRL_MASK << RTL8367B_VLAN_PVID_CTRL_SHIFT(port), From 3d98bb4d3b590159b078aaa712ac51e23bd7348a Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 16 Dec 2016 18:19:59 +0500 Subject: [PATCH 07/49] generic: rtl8367b: remove unused definitions Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index c439bf16a4ee..13065e8c901b 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -118,19 +118,8 @@ #define RTL8367B_SWC0_MAX_LENGTH_16000 RTL8367B_SWC0_MAX_LENGTH(3) #define RTL8367B_CHIP_NUMBER_REG 0x1300 /*GOOD*/ - #define RTL8367B_CHIP_VER_REG 0x1301 /*GOOD*/ -#define RTL8367B_CHIP_VER_RLVID_SHIFT 12 /*GOOD*/ -#define RTL8367B_CHIP_VER_RLVID_MASK 0xf /*GOOD*/ -#define RTL8367B_CHIP_VER_MCID_SHIFT 8 /*GOOD*/ -#define RTL8367B_CHIP_VER_MCID_MASK 0xf /*GOOD*/ -#define RTL8367B_CHIP_VER_BOID_SHIFT 4 /*GOOD*/ -#define RTL8367B_CHIP_VER_BOID_MASK 0xf /*GOOD*/ -#define RTL8367B_CHIP_VER_AFE_SHIFT 0 /*GOOD*/ -#define RTL8367B_CHIP_VER_AFE_MASK 0x1 /*GOOD*/ - #define RTL8367B_CHIP_MODE_REG 0x1302 -#define RTL8367B_CHIP_MODE_MASK 0x7 #define RTL8367B_CHIP_DEBUG0_REG 0x1303 #define RTL8367B_CHIP_DEBUG0_DUMMY0(_x) BIT(8 + (_x)) @@ -161,8 +150,6 @@ #define RTL8367B_DI_FORCE_SPEED_100 1 #define RTL8367B_DI_FORCE_SPEED_1000 2 -#define RTL8367B_MAC_FORCE_REG(_x) (0x1312 + (_x)) - #define RTL8367B_CHIP_RESET_REG 0x1322 /*GOOD*/ #define RTL8367B_CHIP_RESET_SW BIT(1) /*GOOD*/ #define RTL8367B_CHIP_RESET_HW BIT(0) /*GOOD*/ @@ -225,10 +212,6 @@ RTL8367B_PORT_3 | RTL8367B_PORT_4 | RTL8367B_PORT_E0 | \ RTL8367B_PORT_E1 | RTL8367B_PORT_E2) -#define RTL8367B_PORTS_ALL_BUT_CPU \ - (RTL8367B_PORT_0 | RTL8367B_PORT_1 | RTL8367B_PORT_2 | \ - RTL8367B_PORT_3 | RTL8367B_PORT_4 | RTL8367B_PORT_E1 | \ - RTL8367B_PORT_E2) struct rtl8367b_initval { u16 reg; From da7a218e6dac4a8b2531509c3cbd6ace1db7754d Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Sun, 29 Jan 2017 13:10:51 +0500 Subject: [PATCH 08/49] generic: rtl8367b: add macro hardware ports mask Macro selects by mask all hardware ports for batch operations. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8367b.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 13065e8c901b..78655d5c5a53 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -212,6 +212,9 @@ RTL8367B_PORT_3 | RTL8367B_PORT_4 | RTL8367B_PORT_E0 | \ RTL8367B_PORT_E1 | RTL8367B_PORT_E2) +#define RTL8367B_PORT_ALL_EXTERNAL \ + (RTL8367B_PORT_0 | RTL8367B_PORT_1 | RTL8367B_PORT_2 | \ + RTL8367B_PORT_3 | RTL8367B_PORT_4) struct rtl8367b_initval { u16 reg; From 1e2aea338ac69253c95de478bc1539d55b62f3e9 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Tue, 31 Jan 2017 20:23:44 +0500 Subject: [PATCH 09/49] generic: rtl8367b: add methods to manage port state Add methods managing port abilities such as enabled, speed, green mode. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 78655d5c5a53..cf177d238369 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -22,6 +22,8 @@ #define RTL8367B_RESET_DELAY 1000 /* msecs*/ +#define RTL8367B_PHY_NO 5 +#define RTL8367B_PHY_MAX (RTL8367B_PHY_NO - 1) #define RTL8367B_PHY_ADDR_MAX 8 #define RTL8367B_PHY_REG_MAX 31 @@ -216,6 +218,10 @@ (RTL8367B_PORT_0 | RTL8367B_PORT_1 | RTL8367B_PORT_2 | \ RTL8367B_PORT_3 | RTL8367B_PORT_4) +#define RTL8367B_REG_PHY_AD 0x130f +#define RTL8367B_PDN_PHY_OFFSET 5 +#define RTL8367B_PHY_PAGE_ADDRESS 0x1F + struct rtl8367b_initval { u16 reg; u16 val; @@ -306,6 +312,12 @@ rtl8367b_mib_counters[RTL8367B_NUM_MIB_COUNTERS] = { return err; \ } while (0) +#define REG_RD_PHY(_smi, _addr, _reg, _val) \ + REG_RD(_smi, RTL8367B_INTERNAL_PHY_REG(_addr, _reg), _val); + +#define REG_WR_PHY(_smi, _addr, _reg, _val) \ + REG_WR(_smi, RTL8367B_INTERNAL_PHY_REG(_addr, _reg), _val); + static const struct rtl8367b_initval rtl8367r_vb_initvals_0[] = { {0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x0301, 0x0026}, {0x1722, 0x0E14}, {0x205F, 0x0002}, {0x2059, 0x1A00}, {0x205F, 0x0000}, {0x207F, 0x0002}, @@ -668,6 +680,42 @@ static int rtl8367b_write_phy_reg(struct rtl8366_smi *smi, return 0; } +static int rtl8367b_port_phy_reg_set( + struct rtl8366_smi *smi, + u32 phy_addr, u32 phy_reg, u32 value) +{ + int err; + + if (phy_addr > RTL8367B_PHY_ADDR_MAX) + return -EINVAL; + + if (phy_reg > RTL8367B_PHY_REG_MAX) + return -EINVAL; + + REG_WR_PHY(smi, phy_addr, RTL8367B_PHY_PAGE_ADDRESS, 0); + REG_WR_PHY(smi, phy_addr, phy_reg, value); + + return 0; +} + +static int rtl8367b_port_phy_reg_get( + struct rtl8366_smi *smi, + u32 phy_addr, u32 phy_reg, u32 *value) +{ + int err; + + if (phy_addr > RTL8367B_PHY_ADDR_MAX) + return -EINVAL; + + if (phy_reg > RTL8367B_PHY_REG_MAX) + return -EINVAL; + + REG_WR_PHY(smi, phy_addr, RTL8367B_PHY_PAGE_ADDRESS, 0); + REG_RD_PHY(smi, phy_addr, phy_reg, value); + + return 0; +} + static int rtl8367b_init_regs(struct rtl8366_smi *smi) { const struct rtl8367b_initval *initvals; From 496fa7e74ade9701fe09c7a32a308587a46e2b31 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Sat, 19 Nov 2016 00:45:11 +0500 Subject: [PATCH 10/49] generic: rtl8367b: fix external interfaces init Add register and masks for external port #2 Add RGMII mode support for external port #2 Rewrite method according API, fix bit with bypass line rate. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 59 +++++++------------ 1 file changed, 21 insertions(+), 38 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index cf177d238369..2eff9da5eef3 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -129,18 +129,20 @@ #define RTL8367B_CHIP_DEBUG1_REG 0x1304 #define RTL8367B_DIS_REG 0x1305 +#define RTL8367B_DIS_REG_2 0x13c3 #define RTL8367B_DIS_SKIP_MII_RXER(_x) BIT(12 + (_x)) #define RTL8367B_DIS_RGMII_SHIFT(_x) (4 * (_x)) #define RTL8367B_DIS_RGMII_MASK 0x7 +#define RTL8367B_RGMII_MASK 0xF -#define RTL8367B_EXT_RGMXF_REG(_x) (0x1306 + (_x)) +#define RTL8367B_EXT_RGMXF_REG(_x) (0x1306 + (_x) + ((_x > 1)? 0xBD : 0)) #define RTL8367B_EXT_RGMXF_DUMMY0_SHIFT 5 #define RTL8367B_EXT_RGMXF_DUMMY0_MASK 0x7ff #define RTL8367B_EXT_RGMXF_TXDELAY_SHIFT 3 #define RTL8367B_EXT_RGMXF_TXDELAY_MASK 1 #define RTL8367B_EXT_RGMXF_RXDELAY_MASK 0x7 -#define RTL8367B_DI_FORCE_REG(_x) (0x1310 + (_x)) +#define RTL8367B_DI_FORCE_REG(_x) (0x1310 + (_x) + ((_x > 1)? 0xB2 : 0)) #define RTL8367B_DI_FORCE_MODE BIT(12) #define RTL8367B_DI_FORCE_NWAY BIT(7) #define RTL8367B_DI_FORCE_TXPAUSE BIT(6) @@ -772,44 +774,25 @@ static int rtl8367b_extif_set_mode(struct rtl8366_smi *smi, int id, { int err; - /* set port mode */ - switch (mode) { - case RTL8367_EXTIF_MODE_RGMII: - case RTL8367_EXTIF_MODE_RGMII_33V: - REG_WR(smi, RTL8367B_CHIP_DEBUG0_REG, 0x0367); - REG_WR(smi, RTL8367B_CHIP_DEBUG1_REG, 0x7777); - break; - - case RTL8367_EXTIF_MODE_TMII_MAC: - case RTL8367_EXTIF_MODE_TMII_PHY: - REG_RMW(smi, RTL8367B_BYPASS_LINE_RATE_REG, - BIT((id + 1) % 2), BIT((id + 1) % 2)); - break; - - case RTL8367_EXTIF_MODE_GMII: - REG_RMW(smi, RTL8367B_CHIP_DEBUG0_REG, - RTL8367B_CHIP_DEBUG0_DUMMY0(id), - RTL8367B_CHIP_DEBUG0_DUMMY0(id)); + if (mode == RTL8367_EXTIF_MODE_GMII) REG_RMW(smi, RTL8367B_EXT_RGMXF_REG(id), BIT(6), BIT(6)); - break; - - case RTL8367_EXTIF_MODE_MII_MAC: - case RTL8367_EXTIF_MODE_MII_PHY: - case RTL8367_EXTIF_MODE_DISABLED: - REG_RMW(smi, RTL8367B_BYPASS_LINE_RATE_REG, - BIT((id + 1) % 2), 0); - REG_RMW(smi, RTL8367B_EXT_RGMXF_REG(id), BIT(6), 0); - break; - - default: - dev_err(smi->parent, - "invalid mode for external interface %d\n", id); - return -EINVAL; - } + else + if ((mode == RTL8367_EXTIF_MODE_TMII_MAC) || + (mode == RTL8367_EXTIF_MODE_TMII_PHY)) + REG_RMW(smi, RTL8367B_BYPASS_LINE_RATE_REG, + BIT(id % 2), BIT(id % 2)); + else { + REG_RMW(smi, RTL8367B_BYPASS_LINE_RATE_REG, BIT(id), 0); + REG_RMW(smi, RTL8367B_EXT_RGMXF_REG(id), BIT(6), 0); + } - REG_RMW(smi, RTL8367B_DIS_REG, - RTL8367B_DIS_RGMII_MASK << RTL8367B_DIS_RGMII_SHIFT(id), - mode << RTL8367B_DIS_RGMII_SHIFT(id)); + if (id == 0 || id == 1) + REG_RMW(smi, RTL8367B_DIS_REG, + RTL8367B_DIS_RGMII_MASK << RTL8367B_DIS_RGMII_SHIFT(id), + mode << RTL8367B_DIS_RGMII_SHIFT(id)); + else + if (id == 2) + REG_RMW(smi, RTL8367B_DIS_REG_2, RTL8367B_RGMII_MASK, mode); return 0; } From e793e80e20a92e564cb072566bd9719d3d50f808 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Tue, 31 Jan 2017 22:45:31 +0500 Subject: [PATCH 11/49] generic: rtl8367b: enable ports at initialization Force enable PHY and external ports at switch setup. Remove unused definitions and move register init to initval array. Updated only short array as due to detection bug long array never used. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8367b.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 2eff9da5eef3..6540e6562866 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -123,11 +123,6 @@ #define RTL8367B_CHIP_VER_REG 0x1301 /*GOOD*/ #define RTL8367B_CHIP_MODE_REG 0x1302 -#define RTL8367B_CHIP_DEBUG0_REG 0x1303 -#define RTL8367B_CHIP_DEBUG0_DUMMY0(_x) BIT(8 + (_x)) - -#define RTL8367B_CHIP_DEBUG1_REG 0x1304 - #define RTL8367B_DIS_REG 0x1305 #define RTL8367B_DIS_REG_2 0x13c3 #define RTL8367B_DIS_SKIP_MII_RXER(_x) BIT(12 + (_x)) @@ -571,7 +566,8 @@ static const struct rtl8367b_initval rtl8367r_vb_initvals_1[] = { {0x2206, 0x0405}, {0x220F, 0x0000}, {0x221F, 0x0000}, {0x133E, 0x000E}, {0x133F, 0x0010}, {0x13EB, 0x11BB}, {0x207F, 0x0002}, {0x2073, 0x1D22}, {0x207F, 0x0000}, {0x133F, 0x0030}, {0x133E, 0x000E}, {0x2200, 0x1340}, - {0x133E, 0x000E}, {0x133F, 0x0010}, + {0x133E, 0x000E}, {0x133F, 0x0010}, {0x1303, 0x0778}, {0x1304, 0x7777}, + {0x13E2, 0x01FE} }; static int rtl8367b_write_initvals(struct rtl8366_smi *smi, @@ -956,6 +952,9 @@ static int rtl8367b_setup(struct rtl8366_smi *smi) REG_RMW(smi, RTL8367B_SWC0_REG, RTL8367B_SWC0_MAX_LENGTH_MASK, RTL8367B_SWC0_MAX_LENGTH_1536); + /* enable all PHY (if disabled by bootstrap) */ + REG_RMW(smi, RTL8367B_REG_PHY_AD, BIT(RTL8367B_PDN_PHY_OFFSET), 0); + /* * discard VLAN tagged packets if the port is not a member of * the VLAN with which the packets is associated. From 32a6c7cd26e109dc74758f893f9ce832506754ac Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 16 Feb 2017 16:07:13 +0500 Subject: [PATCH 12/49] generic: rtl8367b: fix init values for RTL8367RB chip Replace long init array for RTL8367R-VB to short array for RTL8367RB. Previously init always loaded short array for two chip models but still there is difference among them. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 247 +++--------------- 1 file changed, 38 insertions(+), 209 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 6540e6562866..38e29048ccc0 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -316,216 +316,45 @@ rtl8367b_mib_counters[RTL8367B_NUM_MIB_COUNTERS] = { REG_WR(_smi, RTL8367B_INTERNAL_PHY_REG(_addr, _reg), _val); static const struct rtl8367b_initval rtl8367r_vb_initvals_0[] = { - {0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x0301, 0x0026}, {0x1722, 0x0E14}, - {0x205F, 0x0002}, {0x2059, 0x1A00}, {0x205F, 0x0000}, {0x207F, 0x0002}, - {0x2077, 0x0000}, {0x2078, 0x0000}, {0x2079, 0x0000}, {0x207A, 0x0000}, - {0x207B, 0x0000}, {0x207F, 0x0000}, {0x205F, 0x0002}, {0x2053, 0x0000}, - {0x2054, 0x0000}, {0x2055, 0x0000}, {0x2056, 0x0000}, {0x2057, 0x0000}, - {0x205F, 0x0000}, {0x12A4, 0x110A}, {0x12A6, 0x150A}, {0x13F1, 0x0013}, - {0x13F4, 0x0010}, {0x13F5, 0x0000}, {0x0018, 0x0F00}, {0x0038, 0x0F00}, - {0x0058, 0x0F00}, {0x0078, 0x0F00}, {0x0098, 0x0F00}, {0x12B6, 0x0C02}, - {0x12B7, 0x030F}, {0x12B8, 0x11FF}, {0x12BC, 0x0004}, {0x1362, 0x0115}, - {0x1363, 0x0002}, {0x1363, 0x0000}, {0x133F, 0x0030}, {0x133E, 0x000E}, - {0x221F, 0x0007}, {0x221E, 0x002D}, {0x2218, 0xF030}, {0x221F, 0x0007}, - {0x221E, 0x0023}, {0x2216, 0x0005}, {0x2215, 0x00B9}, {0x2219, 0x0044}, - {0x2215, 0x00BA}, {0x2219, 0x0020}, {0x2215, 0x00BB}, {0x2219, 0x00C1}, - {0x2215, 0x0148}, {0x2219, 0x0096}, {0x2215, 0x016E}, {0x2219, 0x0026}, - {0x2216, 0x0000}, {0x2216, 0x0000}, {0x221E, 0x002D}, {0x2218, 0xF010}, - {0x221F, 0x0007}, {0x221E, 0x0020}, {0x2215, 0x0D00}, {0x221F, 0x0000}, - {0x221F, 0x0000}, {0x2217, 0x2160}, {0x221F, 0x0001}, {0x2210, 0xF25E}, - {0x221F, 0x0007}, {0x221E, 0x0042}, {0x2215, 0x0F00}, {0x2215, 0x0F00}, - {0x2216, 0x7408}, {0x2215, 0x0E00}, {0x2215, 0x0F00}, {0x2215, 0x0F01}, - {0x2216, 0x4000}, {0x2215, 0x0E01}, {0x2215, 0x0F01}, {0x2215, 0x0F02}, - {0x2216, 0x9400}, {0x2215, 0x0E02}, {0x2215, 0x0F02}, {0x2215, 0x0F03}, - {0x2216, 0x7408}, {0x2215, 0x0E03}, {0x2215, 0x0F03}, {0x2215, 0x0F04}, - {0x2216, 0x4008}, {0x2215, 0x0E04}, {0x2215, 0x0F04}, {0x2215, 0x0F05}, - {0x2216, 0x9400}, {0x2215, 0x0E05}, {0x2215, 0x0F05}, {0x2215, 0x0F06}, - {0x2216, 0x0803}, {0x2215, 0x0E06}, {0x2215, 0x0F06}, {0x2215, 0x0D00}, - {0x2215, 0x0100}, {0x221F, 0x0001}, {0x2210, 0xF05E}, {0x221F, 0x0000}, - {0x2217, 0x2100}, {0x221F, 0x0000}, {0x220D, 0x0003}, {0x220E, 0x0015}, - {0x220D, 0x4003}, {0x220E, 0x0006}, {0x221F, 0x0000}, {0x2200, 0x1340}, - {0x133F, 0x0010}, {0x12A0, 0x0058}, {0x12A1, 0x0058}, {0x133E, 0x000E}, - {0x133F, 0x0030}, {0x221F, 0x0000}, {0x2210, 0x0166}, {0x221F, 0x0000}, - {0x133E, 0x000E}, {0x133F, 0x0010}, {0x133F, 0x0030}, {0x133E, 0x000E}, - {0x221F, 0x0005}, {0x2205, 0xFFF6}, {0x2206, 0x0080}, {0x2205, 0x8B6E}, - {0x2206, 0x0000}, {0x220F, 0x0100}, {0x2205, 0x8000}, {0x2206, 0x0280}, - {0x2206, 0x28F7}, {0x2206, 0x00E0}, {0x2206, 0xFFF7}, {0x2206, 0xA080}, + {0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x1305, 0xC000}, {0x121E, 0x03CA}, + {0x1233, 0x0352}, {0x1234, 0x0064}, {0x1237, 0x0096}, {0x1238, 0x0078}, + {0x1239, 0x0084}, {0x123A, 0x0030}, {0x205F, 0x0002}, {0x2059, 0x1A00}, + {0x205F, 0x0000}, {0x207F, 0x0002}, {0x2077, 0x0000}, {0x2078, 0x0000}, + {0x2079, 0x0000}, {0x207A, 0x0000}, {0x207B, 0x0000}, {0x207F, 0x0000}, + {0x205F, 0x0002}, {0x2053, 0x0000}, {0x2054, 0x0000}, {0x2055, 0x0000}, + {0x2056, 0x0000}, {0x2057, 0x0000}, {0x205F, 0x0000}, {0x133F, 0x0030}, + {0x133E, 0x000E}, {0x221F, 0x0005}, {0x2205, 0x8B86}, {0x2206, 0x800E}, + {0x221F, 0x0000}, {0x133F, 0x0010}, {0x12A3, 0x2200}, {0x6107, 0xE58B}, + {0x6103, 0xA970}, {0x0018, 0x0F00}, {0x0038, 0x0F00}, {0x0058, 0x0F00}, + {0x0078, 0x0F00}, {0x0098, 0x0F00}, {0x133F, 0x0030}, {0x133E, 0x000E}, + {0x221F, 0x0005}, {0x2205, 0x8B6E}, {0x2206, 0x0000}, {0x220F, 0x0100}, + {0x2205, 0xFFF6}, {0x2206, 0x0080}, {0x2205, 0x8000}, {0x2206, 0x0280}, + {0x2206, 0x2BF7}, {0x2206, 0x00E0}, {0x2206, 0xFFF7}, {0x2206, 0xA080}, {0x2206, 0x02AE}, {0x2206, 0xF602}, {0x2206, 0x0153}, {0x2206, 0x0201}, - {0x2206, 0x6602}, {0x2206, 0x80B9}, {0x2206, 0xE08B}, {0x2206, 0x8CE1}, - {0x2206, 0x8B8D}, {0x2206, 0x1E01}, {0x2206, 0xE18B}, {0x2206, 0x8E1E}, - {0x2206, 0x01A0}, {0x2206, 0x00E7}, {0x2206, 0xAEDB}, {0x2206, 0xEEE0}, - {0x2206, 0x120E}, {0x2206, 0xEEE0}, {0x2206, 0x1300}, {0x2206, 0xEEE0}, - {0x2206, 0x2001}, {0x2206, 0xEEE0}, {0x2206, 0x2166}, {0x2206, 0xEEE0}, - {0x2206, 0xC463}, {0x2206, 0xEEE0}, {0x2206, 0xC5E8}, {0x2206, 0xEEE0}, - {0x2206, 0xC699}, {0x2206, 0xEEE0}, {0x2206, 0xC7C2}, {0x2206, 0xEEE0}, - {0x2206, 0xC801}, {0x2206, 0xEEE0}, {0x2206, 0xC913}, {0x2206, 0xEEE0}, - {0x2206, 0xCA30}, {0x2206, 0xEEE0}, {0x2206, 0xCB3E}, {0x2206, 0xEEE0}, - {0x2206, 0xDCE1}, {0x2206, 0xEEE0}, {0x2206, 0xDD00}, {0x2206, 0xEEE2}, - {0x2206, 0x0001}, {0x2206, 0xEEE2}, {0x2206, 0x0100}, {0x2206, 0xEEE4}, - {0x2206, 0x8860}, {0x2206, 0xEEE4}, {0x2206, 0x8902}, {0x2206, 0xEEE4}, - {0x2206, 0x8C00}, {0x2206, 0xEEE4}, {0x2206, 0x8D30}, {0x2206, 0xEEEA}, - {0x2206, 0x1480}, {0x2206, 0xEEEA}, {0x2206, 0x1503}, {0x2206, 0xEEEA}, - {0x2206, 0xC600}, {0x2206, 0xEEEA}, {0x2206, 0xC706}, {0x2206, 0xEE85}, - {0x2206, 0xEE00}, {0x2206, 0xEE85}, {0x2206, 0xEF00}, {0x2206, 0xEE8B}, - {0x2206, 0x6750}, {0x2206, 0xEE8B}, {0x2206, 0x6632}, {0x2206, 0xEE8A}, - {0x2206, 0xD448}, {0x2206, 0xEE8A}, {0x2206, 0xD548}, {0x2206, 0xEE8A}, - {0x2206, 0xD649}, {0x2206, 0xEE8A}, {0x2206, 0xD7F8}, {0x2206, 0xEE8B}, - {0x2206, 0x85E2}, {0x2206, 0xEE8B}, {0x2206, 0x8700}, {0x2206, 0xEEFF}, - {0x2206, 0xF600}, {0x2206, 0xEEFF}, {0x2206, 0xF7FC}, {0x2206, 0x04F8}, - {0x2206, 0xE08B}, {0x2206, 0x8EAD}, {0x2206, 0x2023}, {0x2206, 0xF620}, - {0x2206, 0xE48B}, {0x2206, 0x8E02}, {0x2206, 0x2877}, {0x2206, 0x0225}, - {0x2206, 0xC702}, {0x2206, 0x26A1}, {0x2206, 0x0281}, {0x2206, 0xB302}, - {0x2206, 0x8496}, {0x2206, 0x0202}, {0x2206, 0xA102}, {0x2206, 0x27F1}, - {0x2206, 0x0228}, {0x2206, 0xF902}, {0x2206, 0x2AA0}, {0x2206, 0x0282}, - {0x2206, 0xB8E0}, {0x2206, 0x8B8E}, {0x2206, 0xAD21}, {0x2206, 0x08F6}, - {0x2206, 0x21E4}, {0x2206, 0x8B8E}, {0x2206, 0x0202}, {0x2206, 0x80E0}, - {0x2206, 0x8B8E}, {0x2206, 0xAD22}, {0x2206, 0x05F6}, {0x2206, 0x22E4}, - {0x2206, 0x8B8E}, {0x2206, 0xE08B}, {0x2206, 0x8EAD}, {0x2206, 0x2305}, - {0x2206, 0xF623}, {0x2206, 0xE48B}, {0x2206, 0x8EE0}, {0x2206, 0x8B8E}, - {0x2206, 0xAD24}, {0x2206, 0x08F6}, {0x2206, 0x24E4}, {0x2206, 0x8B8E}, - {0x2206, 0x0227}, {0x2206, 0x6AE0}, {0x2206, 0x8B8E}, {0x2206, 0xAD25}, - {0x2206, 0x05F6}, {0x2206, 0x25E4}, {0x2206, 0x8B8E}, {0x2206, 0xE08B}, - {0x2206, 0x8EAD}, {0x2206, 0x260B}, {0x2206, 0xF626}, {0x2206, 0xE48B}, - {0x2206, 0x8E02}, {0x2206, 0x830D}, {0x2206, 0x021D}, {0x2206, 0x6BE0}, - {0x2206, 0x8B8E}, {0x2206, 0xAD27}, {0x2206, 0x05F6}, {0x2206, 0x27E4}, - {0x2206, 0x8B8E}, {0x2206, 0x0281}, {0x2206, 0x4402}, {0x2206, 0x045C}, - {0x2206, 0xFC04}, {0x2206, 0xF8E0}, {0x2206, 0x8B83}, {0x2206, 0xAD23}, - {0x2206, 0x30E0}, {0x2206, 0xE022}, {0x2206, 0xE1E0}, {0x2206, 0x2359}, - {0x2206, 0x02E0}, {0x2206, 0x85EF}, {0x2206, 0xE585}, {0x2206, 0xEFAC}, - {0x2206, 0x2907}, {0x2206, 0x1F01}, {0x2206, 0x9E51}, {0x2206, 0xAD29}, - {0x2206, 0x20E0}, {0x2206, 0x8B83}, {0x2206, 0xAD21}, {0x2206, 0x06E1}, - {0x2206, 0x8B84}, {0x2206, 0xAD28}, {0x2206, 0x42E0}, {0x2206, 0x8B85}, - {0x2206, 0xAD21}, {0x2206, 0x06E1}, {0x2206, 0x8B84}, {0x2206, 0xAD29}, - {0x2206, 0x36BF}, {0x2206, 0x34BF}, {0x2206, 0x022C}, {0x2206, 0x31AE}, - {0x2206, 0x2EE0}, {0x2206, 0x8B83}, {0x2206, 0xAD21}, {0x2206, 0x10E0}, - {0x2206, 0x8B84}, {0x2206, 0xF620}, {0x2206, 0xE48B}, {0x2206, 0x84EE}, - {0x2206, 0x8ADA}, {0x2206, 0x00EE}, {0x2206, 0x8ADB}, {0x2206, 0x00E0}, - {0x2206, 0x8B85}, {0x2206, 0xAD21}, {0x2206, 0x0CE0}, {0x2206, 0x8B84}, - {0x2206, 0xF621}, {0x2206, 0xE48B}, {0x2206, 0x84EE}, {0x2206, 0x8B72}, - {0x2206, 0xFFBF}, {0x2206, 0x34C2}, {0x2206, 0x022C}, {0x2206, 0x31FC}, - {0x2206, 0x04F8}, {0x2206, 0xFAEF}, {0x2206, 0x69E0}, {0x2206, 0x8B85}, - {0x2206, 0xAD21}, {0x2206, 0x42E0}, {0x2206, 0xE022}, {0x2206, 0xE1E0}, - {0x2206, 0x2358}, {0x2206, 0xC059}, {0x2206, 0x021E}, {0x2206, 0x01E1}, - {0x2206, 0x8B72}, {0x2206, 0x1F10}, {0x2206, 0x9E2F}, {0x2206, 0xE48B}, - {0x2206, 0x72AD}, {0x2206, 0x2123}, {0x2206, 0xE18B}, {0x2206, 0x84F7}, - {0x2206, 0x29E5}, {0x2206, 0x8B84}, {0x2206, 0xAC27}, {0x2206, 0x10AC}, - {0x2206, 0x2605}, {0x2206, 0x0205}, {0x2206, 0x23AE}, {0x2206, 0x1602}, - {0x2206, 0x0535}, {0x2206, 0x0282}, {0x2206, 0x30AE}, {0x2206, 0x0E02}, - {0x2206, 0x056A}, {0x2206, 0x0282}, {0x2206, 0x75AE}, {0x2206, 0x0602}, - {0x2206, 0x04DC}, {0x2206, 0x0282}, {0x2206, 0x04EF}, {0x2206, 0x96FE}, - {0x2206, 0xFC04}, {0x2206, 0xF8F9}, {0x2206, 0xE08B}, {0x2206, 0x87AD}, - {0x2206, 0x2321}, {0x2206, 0xE0EA}, {0x2206, 0x14E1}, {0x2206, 0xEA15}, - {0x2206, 0xAD26}, {0x2206, 0x18F6}, {0x2206, 0x27E4}, {0x2206, 0xEA14}, - {0x2206, 0xE5EA}, {0x2206, 0x15F6}, {0x2206, 0x26E4}, {0x2206, 0xEA14}, - {0x2206, 0xE5EA}, {0x2206, 0x15F7}, {0x2206, 0x27E4}, {0x2206, 0xEA14}, - {0x2206, 0xE5EA}, {0x2206, 0x15FD}, {0x2206, 0xFC04}, {0x2206, 0xF8F9}, - {0x2206, 0xE08B}, {0x2206, 0x87AD}, {0x2206, 0x233A}, {0x2206, 0xAD22}, - {0x2206, 0x37E0}, {0x2206, 0xE020}, {0x2206, 0xE1E0}, {0x2206, 0x21AC}, - {0x2206, 0x212E}, {0x2206, 0xE0EA}, {0x2206, 0x14E1}, {0x2206, 0xEA15}, - {0x2206, 0xF627}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15}, - {0x2206, 0xE2EA}, {0x2206, 0x12E3}, {0x2206, 0xEA13}, {0x2206, 0x5A8F}, - {0x2206, 0x6A20}, {0x2206, 0xE6EA}, {0x2206, 0x12E7}, {0x2206, 0xEA13}, - {0x2206, 0xF726}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15}, - {0x2206, 0xF727}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15}, - {0x2206, 0xFDFC}, {0x2206, 0x04F8}, {0x2206, 0xF9E0}, {0x2206, 0x8B87}, - {0x2206, 0xAD23}, {0x2206, 0x38AD}, {0x2206, 0x2135}, {0x2206, 0xE0E0}, - {0x2206, 0x20E1}, {0x2206, 0xE021}, {0x2206, 0xAC21}, {0x2206, 0x2CE0}, - {0x2206, 0xEA14}, {0x2206, 0xE1EA}, {0x2206, 0x15F6}, {0x2206, 0x27E4}, - {0x2206, 0xEA14}, {0x2206, 0xE5EA}, {0x2206, 0x15E2}, {0x2206, 0xEA12}, - {0x2206, 0xE3EA}, {0x2206, 0x135A}, {0x2206, 0x8FE6}, {0x2206, 0xEA12}, - {0x2206, 0xE7EA}, {0x2206, 0x13F7}, {0x2206, 0x26E4}, {0x2206, 0xEA14}, - {0x2206, 0xE5EA}, {0x2206, 0x15F7}, {0x2206, 0x27E4}, {0x2206, 0xEA14}, - {0x2206, 0xE5EA}, {0x2206, 0x15FD}, {0x2206, 0xFC04}, {0x2206, 0xF8FA}, - {0x2206, 0xEF69}, {0x2206, 0xE08B}, {0x2206, 0x86AD}, {0x2206, 0x2146}, - {0x2206, 0xE0E0}, {0x2206, 0x22E1}, {0x2206, 0xE023}, {0x2206, 0x58C0}, - {0x2206, 0x5902}, {0x2206, 0x1E01}, {0x2206, 0xE18B}, {0x2206, 0x651F}, - {0x2206, 0x109E}, {0x2206, 0x33E4}, {0x2206, 0x8B65}, {0x2206, 0xAD21}, - {0x2206, 0x22AD}, {0x2206, 0x272A}, {0x2206, 0xD400}, {0x2206, 0x01BF}, - {0x2206, 0x34F2}, {0x2206, 0x022C}, {0x2206, 0xA2BF}, {0x2206, 0x34F5}, - {0x2206, 0x022C}, {0x2206, 0xE0E0}, {0x2206, 0x8B67}, {0x2206, 0x1B10}, - {0x2206, 0xAA14}, {0x2206, 0xE18B}, {0x2206, 0x660D}, {0x2206, 0x1459}, - {0x2206, 0x0FAE}, {0x2206, 0x05E1}, {0x2206, 0x8B66}, {0x2206, 0x590F}, - {0x2206, 0xBF85}, {0x2206, 0x6102}, {0x2206, 0x2CA2}, {0x2206, 0xEF96}, - {0x2206, 0xFEFC}, {0x2206, 0x04F8}, {0x2206, 0xF9FA}, {0x2206, 0xFBEF}, - {0x2206, 0x79E2}, {0x2206, 0x8AD2}, {0x2206, 0xAC19}, {0x2206, 0x2DE0}, - {0x2206, 0xE036}, {0x2206, 0xE1E0}, {0x2206, 0x37EF}, {0x2206, 0x311F}, - {0x2206, 0x325B}, {0x2206, 0x019E}, {0x2206, 0x1F7A}, {0x2206, 0x0159}, - {0x2206, 0x019F}, {0x2206, 0x0ABF}, {0x2206, 0x348E}, {0x2206, 0x022C}, - {0x2206, 0x31F6}, {0x2206, 0x06AE}, {0x2206, 0x0FF6}, {0x2206, 0x0302}, - {0x2206, 0x0470}, {0x2206, 0xF703}, {0x2206, 0xF706}, {0x2206, 0xBF34}, - {0x2206, 0x9302}, {0x2206, 0x2C31}, {0x2206, 0xAC1A}, {0x2206, 0x25E0}, - {0x2206, 0xE022}, {0x2206, 0xE1E0}, {0x2206, 0x23EF}, {0x2206, 0x300D}, - {0x2206, 0x311F}, {0x2206, 0x325B}, {0x2206, 0x029E}, {0x2206, 0x157A}, - {0x2206, 0x0258}, {0x2206, 0xC4A0}, {0x2206, 0x0408}, {0x2206, 0xBF34}, - {0x2206, 0x9E02}, {0x2206, 0x2C31}, {0x2206, 0xAE06}, {0x2206, 0xBF34}, - {0x2206, 0x9C02}, {0x2206, 0x2C31}, {0x2206, 0xAC1B}, {0x2206, 0x4AE0}, - {0x2206, 0xE012}, {0x2206, 0xE1E0}, {0x2206, 0x13EF}, {0x2206, 0x300D}, - {0x2206, 0x331F}, {0x2206, 0x325B}, {0x2206, 0x1C9E}, {0x2206, 0x3AEF}, - {0x2206, 0x325B}, {0x2206, 0x1C9F}, {0x2206, 0x09BF}, {0x2206, 0x3498}, - {0x2206, 0x022C}, {0x2206, 0x3102}, {0x2206, 0x83C5}, {0x2206, 0x5A03}, - {0x2206, 0x0D03}, {0x2206, 0x581C}, {0x2206, 0x1E20}, {0x2206, 0x0207}, - {0x2206, 0xA0A0}, {0x2206, 0x000E}, {0x2206, 0x0284}, {0x2206, 0x17AD}, - {0x2206, 0x1817}, {0x2206, 0xBF34}, {0x2206, 0x9A02}, {0x2206, 0x2C31}, - {0x2206, 0xAE0F}, {0x2206, 0xBF34}, {0x2206, 0xC802}, {0x2206, 0x2C31}, - {0x2206, 0xBF34}, {0x2206, 0xC502}, {0x2206, 0x2C31}, {0x2206, 0x0284}, - {0x2206, 0x52E6}, {0x2206, 0x8AD2}, {0x2206, 0xEF97}, {0x2206, 0xFFFE}, - {0x2206, 0xFDFC}, {0x2206, 0x04F8}, {0x2206, 0xBF34}, {0x2206, 0xDA02}, - {0x2206, 0x2CE0}, {0x2206, 0xE58A}, {0x2206, 0xD3BF}, {0x2206, 0x34D4}, - {0x2206, 0x022C}, {0x2206, 0xE00C}, {0x2206, 0x1159}, {0x2206, 0x02E0}, - {0x2206, 0x8AD3}, {0x2206, 0x1E01}, {0x2206, 0xE48A}, {0x2206, 0xD3D1}, - {0x2206, 0x00BF}, {0x2206, 0x34DA}, {0x2206, 0x022C}, {0x2206, 0xA2D1}, - {0x2206, 0x01BF}, {0x2206, 0x34D4}, {0x2206, 0x022C}, {0x2206, 0xA2BF}, - {0x2206, 0x34CB}, {0x2206, 0x022C}, {0x2206, 0xE0E5}, {0x2206, 0x8ACE}, - {0x2206, 0xBF85}, {0x2206, 0x6702}, {0x2206, 0x2CE0}, {0x2206, 0xE58A}, - {0x2206, 0xCFBF}, {0x2206, 0x8564}, {0x2206, 0x022C}, {0x2206, 0xE0E5}, - {0x2206, 0x8AD0}, {0x2206, 0xBF85}, {0x2206, 0x6A02}, {0x2206, 0x2CE0}, - {0x2206, 0xE58A}, {0x2206, 0xD1FC}, {0x2206, 0x04F8}, {0x2206, 0xE18A}, - {0x2206, 0xD1BF}, {0x2206, 0x856A}, {0x2206, 0x022C}, {0x2206, 0xA2E1}, - {0x2206, 0x8AD0}, {0x2206, 0xBF85}, {0x2206, 0x6402}, {0x2206, 0x2CA2}, - {0x2206, 0xE18A}, {0x2206, 0xCFBF}, {0x2206, 0x8567}, {0x2206, 0x022C}, - {0x2206, 0xA2E1}, {0x2206, 0x8ACE}, {0x2206, 0xBF34}, {0x2206, 0xCB02}, - {0x2206, 0x2CA2}, {0x2206, 0xE18A}, {0x2206, 0xD3BF}, {0x2206, 0x34DA}, - {0x2206, 0x022C}, {0x2206, 0xA2E1}, {0x2206, 0x8AD3}, {0x2206, 0x0D11}, - {0x2206, 0xBF34}, {0x2206, 0xD402}, {0x2206, 0x2CA2}, {0x2206, 0xFC04}, - {0x2206, 0xF9A0}, {0x2206, 0x0405}, {0x2206, 0xE38A}, {0x2206, 0xD4AE}, - {0x2206, 0x13A0}, {0x2206, 0x0805}, {0x2206, 0xE38A}, {0x2206, 0xD5AE}, - {0x2206, 0x0BA0}, {0x2206, 0x0C05}, {0x2206, 0xE38A}, {0x2206, 0xD6AE}, - {0x2206, 0x03E3}, {0x2206, 0x8AD7}, {0x2206, 0xEF13}, {0x2206, 0xBF34}, - {0x2206, 0xCB02}, {0x2206, 0x2CA2}, {0x2206, 0xEF13}, {0x2206, 0x0D11}, - {0x2206, 0xBF85}, {0x2206, 0x6702}, {0x2206, 0x2CA2}, {0x2206, 0xEF13}, - {0x2206, 0x0D14}, {0x2206, 0xBF85}, {0x2206, 0x6402}, {0x2206, 0x2CA2}, - {0x2206, 0xEF13}, {0x2206, 0x0D17}, {0x2206, 0xBF85}, {0x2206, 0x6A02}, - {0x2206, 0x2CA2}, {0x2206, 0xFD04}, {0x2206, 0xF8E0}, {0x2206, 0x8B85}, - {0x2206, 0xAD27}, {0x2206, 0x2DE0}, {0x2206, 0xE036}, {0x2206, 0xE1E0}, - {0x2206, 0x37E1}, {0x2206, 0x8B73}, {0x2206, 0x1F10}, {0x2206, 0x9E20}, - {0x2206, 0xE48B}, {0x2206, 0x73AC}, {0x2206, 0x200B}, {0x2206, 0xAC21}, - {0x2206, 0x0DAC}, {0x2206, 0x250F}, {0x2206, 0xAC27}, {0x2206, 0x0EAE}, - {0x2206, 0x0F02}, {0x2206, 0x84CC}, {0x2206, 0xAE0A}, {0x2206, 0x0284}, - {0x2206, 0xD1AE}, {0x2206, 0x05AE}, {0x2206, 0x0302}, {0x2206, 0x84D8}, - {0x2206, 0xFC04}, {0x2206, 0xEE8B}, {0x2206, 0x6800}, {0x2206, 0x0402}, - {0x2206, 0x84E5}, {0x2206, 0x0285}, {0x2206, 0x2804}, {0x2206, 0x0285}, - {0x2206, 0x4904}, {0x2206, 0xEE8B}, {0x2206, 0x6800}, {0x2206, 0xEE8B}, - {0x2206, 0x6902}, {0x2206, 0x04F8}, {0x2206, 0xF9E0}, {0x2206, 0x8B85}, - {0x2206, 0xAD26}, {0x2206, 0x38D0}, {0x2206, 0x0B02}, {0x2206, 0x2B4D}, - {0x2206, 0x5882}, {0x2206, 0x7882}, {0x2206, 0x9F2D}, {0x2206, 0xE08B}, - {0x2206, 0x68E1}, {0x2206, 0x8B69}, {0x2206, 0x1F10}, {0x2206, 0x9EC8}, - {0x2206, 0x10E4}, {0x2206, 0x8B68}, {0x2206, 0xE0E0}, {0x2206, 0x00E1}, - {0x2206, 0xE001}, {0x2206, 0xF727}, {0x2206, 0xE4E0}, {0x2206, 0x00E5}, - {0x2206, 0xE001}, {0x2206, 0xE2E0}, {0x2206, 0x20E3}, {0x2206, 0xE021}, - {0x2206, 0xAD30}, {0x2206, 0xF7F6}, {0x2206, 0x27E4}, {0x2206, 0xE000}, - {0x2206, 0xE5E0}, {0x2206, 0x01FD}, {0x2206, 0xFC04}, {0x2206, 0xF8FA}, - {0x2206, 0xEF69}, {0x2206, 0xE08B}, {0x2206, 0x86AD}, {0x2206, 0x2212}, - {0x2206, 0xE0E0}, {0x2206, 0x14E1}, {0x2206, 0xE015}, {0x2206, 0xAD26}, - {0x2206, 0x9CE1}, {0x2206, 0x85E0}, {0x2206, 0xBF85}, {0x2206, 0x6D02}, - {0x2206, 0x2CA2}, {0x2206, 0xEF96}, {0x2206, 0xFEFC}, {0x2206, 0x04F8}, - {0x2206, 0xFAEF}, {0x2206, 0x69E0}, {0x2206, 0x8B86}, {0x2206, 0xAD22}, - {0x2206, 0x09E1}, {0x2206, 0x85E1}, {0x2206, 0xBF85}, {0x2206, 0x6D02}, - {0x2206, 0x2CA2}, {0x2206, 0xEF96}, {0x2206, 0xFEFC}, {0x2206, 0x0464}, - {0x2206, 0xE48C}, {0x2206, 0xFDE4}, {0x2206, 0x80CA}, {0x2206, 0xE480}, - {0x2206, 0x66E0}, {0x2206, 0x8E70}, {0x2206, 0xE076}, {0x2205, 0xE142}, - {0x2206, 0x0701}, {0x2205, 0xE140}, {0x2206, 0x0405}, {0x220F, 0x0000}, - {0x221F, 0x0000}, {0x2200, 0x1340}, {0x133E, 0x000E}, {0x133F, 0x0010}, - {0x13EB, 0x11BB} + {0x2206, 0x6602}, {0x2206, 0x8044}, {0x2206, 0x0201}, {0x2206, 0x7CE0}, + {0x2206, 0x8B8C}, {0x2206, 0xE18B}, {0x2206, 0x8D1E}, {0x2206, 0x01E1}, + {0x2206, 0x8B8E}, {0x2206, 0x1E01}, {0x2206, 0xA000}, {0x2206, 0xE4AE}, + {0x2206, 0xD8EE}, {0x2206, 0x85C0}, {0x2206, 0x00EE}, {0x2206, 0x85C1}, + {0x2206, 0x00EE}, {0x2206, 0x8AFC}, {0x2206, 0x07EE}, {0x2206, 0x8AFD}, + {0x2206, 0x73EE}, {0x2206, 0xFFF6}, {0x2206, 0x00EE}, {0x2206, 0xFFF7}, + {0x2206, 0xFC04}, {0x2206, 0xF8E0}, {0x2206, 0x8B8E}, {0x2206, 0xAD20}, + {0x2206, 0x0302}, {0x2206, 0x8050}, {0x2206, 0xFC04}, {0x2206, 0xF8F9}, + {0x2206, 0xE08B}, {0x2206, 0x85AD}, {0x2206, 0x2548}, {0x2206, 0xE08A}, + {0x2206, 0xE4E1}, {0x2206, 0x8AE5}, {0x2206, 0x7C00}, {0x2206, 0x009E}, + {0x2206, 0x35EE}, {0x2206, 0x8AE4}, {0x2206, 0x00EE}, {0x2206, 0x8AE5}, + {0x2206, 0x00E0}, {0x2206, 0x8AFC}, {0x2206, 0xE18A}, {0x2206, 0xFDE2}, + {0x2206, 0x85C0}, {0x2206, 0xE385}, {0x2206, 0xC102}, {0x2206, 0x2DAC}, + {0x2206, 0xAD20}, {0x2206, 0x12EE}, {0x2206, 0x8AE4}, {0x2206, 0x03EE}, + {0x2206, 0x8AE5}, {0x2206, 0xB7EE}, {0x2206, 0x85C0}, {0x2206, 0x00EE}, + {0x2206, 0x85C1}, {0x2206, 0x00AE}, {0x2206, 0x1115}, {0x2206, 0xE685}, + {0x2206, 0xC0E7}, {0x2206, 0x85C1}, {0x2206, 0xAE08}, {0x2206, 0xEE85}, + {0x2206, 0xC000}, {0x2206, 0xEE85}, {0x2206, 0xC100}, {0x2206, 0xFDFC}, + {0x2206, 0x0400}, {0x2205, 0xE142}, {0x2206, 0x0701}, {0x2205, 0xE140}, + {0x2206, 0x0405}, {0x220F, 0x0000}, {0x221F, 0x0000}, {0x133E, 0x000E}, + {0x133F, 0x0010}, {0x13E0, 0x0010}, {0x207F, 0x0002}, {0x2073, 0x1D22}, + {0x207F, 0x0000}, {0x133F, 0x0030}, {0x133E, 0x000E}, {0x2200, 0x1340}, + {0x133E, 0x000E}, {0x133F, 0x0010}, {0x1303, 0x0778}, {0x1304, 0x7777}, + {0x13E2, 0x01FE} }; static const struct rtl8367b_initval rtl8367r_vb_initvals_1[] = { From 5318c4ed3149db65f4e8593b35926253e1da56fb Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 16 Feb 2017 16:26:59 +0500 Subject: [PATCH 13/49] generic: rtl8367b: update init array names Update names according to chip names. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../linux/generic/files/drivers/net/phy/rtl8367b.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 38e29048ccc0..dabf0854738c 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -315,7 +315,7 @@ rtl8367b_mib_counters[RTL8367B_NUM_MIB_COUNTERS] = { #define REG_WR_PHY(_smi, _addr, _reg, _val) \ REG_WR(_smi, RTL8367B_INTERNAL_PHY_REG(_addr, _reg), _val); -static const struct rtl8367b_initval rtl8367r_vb_initvals_0[] = { +static const struct rtl8367b_initval rtl8367rb_initvals[] = { {0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x1305, 0xC000}, {0x121E, 0x03CA}, {0x1233, 0x0352}, {0x1234, 0x0064}, {0x1237, 0x0096}, {0x1238, 0x0078}, {0x1239, 0x0084}, {0x123A, 0x0030}, {0x205F, 0x0002}, {0x2059, 0x1A00}, @@ -357,7 +357,7 @@ static const struct rtl8367b_initval rtl8367r_vb_initvals_0[] = { {0x13E2, 0x01FE} }; -static const struct rtl8367b_initval rtl8367r_vb_initvals_1[] = { +static const struct rtl8367b_initval rtl8367r_vb_initvals[] = { {0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x1305, 0xC000}, {0x121E, 0x03CA}, {0x1233, 0x0352}, {0x1234, 0x0064}, {0x1237, 0x0096}, {0x1238, 0x0078}, {0x1239, 0x0084}, {0x123A, 0x0030}, {0x205F, 0x0002}, {0x2059, 0x1A00}, @@ -550,13 +550,13 @@ static int rtl8367b_init_regs(struct rtl8366_smi *smi) switch (smi->chip_ver) { case 0x1000: - initvals = rtl8367r_vb_initvals_0; - count = ARRAY_SIZE(rtl8367r_vb_initvals_0); + initvals = rtl8367rb_initvals; + count = ARRAY_SIZE(rtl8367rb_initvals); break; case 0x1010: - initvals = rtl8367r_vb_initvals_1; - count = ARRAY_SIZE(rtl8367r_vb_initvals_1); + initvals = rtl8367r_vb_initvals; + count = ARRAY_SIZE(rtl8367r_vb_initvals); break; default: From c09e327f99da3e2613cd2393e5d04fe98287547e Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 11:33:58 +0500 Subject: [PATCH 14/49] generic: rtl8367b: fix port enable method Previously method marked port as not permitted, perform actual port on/off. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index dabf0854738c..47581088d742 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -1039,10 +1039,25 @@ static int rtl8367b_is_vlan_valid(struct rtl8366_smi *smi, unsigned vlan) static int rtl8367b_enable_port(struct rtl8366_smi *smi, int port, int enable) { int err; + u32 data; + + dev_dbg(smi->parent, "port #%d set %s\n", port + 1, (enable == 1)? "on" : "off"); + /* Port isolation */ REG_WR(smi, RTL8367B_PORT_ISOLATION_REG(port), (enable) ? RTL8367B_PORTS_ALL : 0); + /* Power up/down port */ + err = rtl8367b_port_phy_reg_get(smi, port, 0, &data); + if (err == 0) { + if (enable) + data &= ~(1U << 11); + else + data |= (1U << 11); + + rtl8367b_port_phy_reg_set(smi, port, 0, data); + } + return 0; } From bd0dd8d5fc3cde169d02d971e8f8db60439566f2 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 12:09:40 +0500 Subject: [PATCH 15/49] generic: rtl8367b: add LED mode options Add register and mask definitions for LED operations Add LED control methods: group enable, switch serial/parallel mode, set group mode, get/set blink rate. Add swconfig methods: get/set group mode, get/set blink rate. Add LED initialisation Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 172 ++++++++++++++++++ 1 file changed, 172 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 47581088d742..a14f099a1ccc 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -219,6 +219,22 @@ #define RTL8367B_PDN_PHY_OFFSET 5 #define RTL8367B_PHY_PAGE_ADDRESS 0x1F +#define RTL8367B_REG_LED_MODE 0x1b02 +#define RTL8367B_REG_LED_CONFIGURATION 0x1b03 +#define RTL8367B_REG_LED_SYS_CONFIG 0x1b00 +#define RTL8367B_REG_PARA_LED_IO_EN1 0x1b24 +#define RTL8367B_REG_SCAN0_LED_IO_EN 0x1b26 +#define RTL8367B_LED_CONFIG_SEL_OFFSET 14 +#define RTL8367B_LED_SERI_CLK_EN_OFFSET 0 +#define RTL8367B_LED_SELECT_OFFSET 0 +#define RTL8367B_LED_SERI_DATA_EN_OFFSET 1 +#define RTL8367B_LED0_CFG_MASK 0xF +#define RTL8367B_LED1_CFG_MASK 0xF0 +#define RTL8367B_LED2_CFG_MASK 0xF00 +#define RTL8367B_LEDGROUPNO 3 +#define RTL8367B_LEDGROUPMASK 0x7 +#define RTL8367B_SEL_LEDRATE_MASK 0xE + struct rtl8367b_initval { u16 reg; u16 val; @@ -746,6 +762,86 @@ static int rtl8367b_extif_init_of(struct rtl8366_smi *smi, int id, } #endif +static int rtl8367b_led_group_enable(struct rtl8366_smi *smi, u32 group) +{ + return rtl8366_smi_rmwr(smi, + RTL8367B_REG_PARA_LED_IO_EN1 + group / 2, + 0xFF << ((group % 2) * 8), RTL8367B_PORT_ALL_EXTERNAL); +} + +/* Set serial/parallel led mode */ +static int rtl8367b_led_op_mode(struct rtl8366_smi *smi, u32 mode) +{ + int err; + + /* Invalid input parameter */ + if (mode > 1) + return -EINVAL; + + /* Set parallel mode */ + err = rtl8366_smi_rmwr(smi, RTL8367B_REG_LED_SYS_CONFIG, BIT(RTL8367B_LED_SELECT_OFFSET), mode); + if (err) return err; + + /* Disable serial CLK mode */ + err = rtl8366_smi_rmwr(smi, RTL8367B_REG_SCAN0_LED_IO_EN, BIT(RTL8367B_LED_SERI_CLK_EN_OFFSET), mode); + if (err) return err; + + /* Disable serial DATA mode */ + err = rtl8366_smi_rmwr(smi, + RTL8367B_REG_SCAN0_LED_IO_EN, + BIT(RTL8367B_LED_SERI_DATA_EN_OFFSET), + mode << RTL8367B_LED_SERI_DATA_EN_OFFSET); + if (err) return err; + + return 0; +} + +static int rtl8367b_led_group_set_mode(struct rtl8366_smi *smi, + u32 group, u32 mode) +{ + int err; + + if(group > 2) + return -EINVAL; + + if(mode > 15) + return -EINVAL; + + /* Switch off bit */ + err = rtl8366_smi_rmwr(smi, + RTL8367B_REG_LED_CONFIGURATION, + BIT(RTL8367B_LED_CONFIG_SEL_OFFSET), 0); + if (err) return err; + + return rtl8366_smi_rmwr(smi, RTL8367B_REG_LED_CONFIGURATION, + 0xF << (4 * group), + mode << (4 * group)); +} + +static int rtl8367b_set_led_blinkrate(struct rtl8366_smi *smi, u32 blinkRate) +{ + int err; + + if (blinkRate > 7) + return -EINVAL; + + REG_RMW(smi, RTL8367B_REG_LED_MODE, RTL8367B_SEL_LEDRATE_MASK, blinkRate); + + return 0; +} + +static int rtl8367b_get_led_blinkrate(struct rtl8366_smi *smi, u32 *blinkRate) +{ + int err; + + err = rtl8366_smi_read_reg(smi, RTL8367B_REG_LED_MODE, blinkRate); + if (err) return err; + + *blinkRate = *blinkRate & RTL8367B_SEL_LEDRATE_MASK; + + return 0; +} + static int rtl8367b_setup(struct rtl8366_smi *smi) { struct rtl8367_platform_data *pdata; @@ -801,6 +897,17 @@ static int rtl8367b_setup(struct rtl8366_smi *smi) RTL8367B_PORT_MISC_CFG_EGRESS_MODE_ORIGINAL << RTL8367B_PORT_MISC_CFG_EGRESS_MODE_SHIFT); + /* setup LEDs */ + err = rtl8367b_led_group_enable(smi, 0); + if (err) return err; + + /* Set led to parallel mode */ + err = rtl8367b_led_op_mode(smi, 0); + if (err) return err; + + err = rtl8367b_led_group_set_mode(smi, 0, 2); + if (err) return err; + return 0; } @@ -1154,6 +1261,57 @@ static int rtl8367b_sw_set_max_length(struct switch_dev *dev, RTL8367B_SWC0_MAX_LENGTH_MASK, max_len); } +static int rtl8367b_sw_get_led_blink(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + u32 data; + + if (rtl8367b_get_led_blinkrate(smi, &data)) + return -EIO; + + val->value.i = data; + + return 0; +} + +static int rtl8367b_sw_set_led_blink(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + if (val->value.i > 15) + return -EINVAL; + + return rtl8367b_set_led_blinkrate(smi, val->value.i); +} + +static int rtl8367b_sw_get_led(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + u32 data; + + rtl8366_smi_read_reg(smi, RTL8367B_REG_LED_CONFIGURATION, &data); + val->value.i = data & 0xF; + + return 0; +} + +static int rtl8367b_sw_set_led(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + if (val->value.i > 15) + return -EINVAL; + + return rtl8367b_led_group_set_mode(smi, 0, val->value.i); +} static int rtl8367b_sw_reset_port_mibs(struct switch_dev *dev, const struct switch_attr *attr, @@ -1200,6 +1358,20 @@ static struct switch_attr rtl8367b_globals[] = { .set = rtl8367b_sw_set_max_length, .get = rtl8367b_sw_get_max_length, .max = 3, + }, { + .type = SWITCH_TYPE_INT, + .name = "led", + .description = "Set LED mode led (0 - disable)", + .get = rtl8367b_sw_get_led, + .set = rtl8367b_sw_set_led, + .max = 15, + }, { + .type = SWITCH_TYPE_INT, + .name = "blink", + .description = "Set LED blink rate (0:43ms, 1:84ms, 2:120ms, 3:170ms, 4:340ms, 5:670ms)", + .get = rtl8367b_sw_get_led_blink, + .set = rtl8367b_sw_set_led_blink, + .max = 7, } }; From c39e271e49f5016b6f0d9354d7a87546b9ce5185 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 12:11:18 +0500 Subject: [PATCH 16/49] generic: rtl8367b: add green mode option MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add swconfig methods to allow automatically manage port power with Realtek’s Green Ethernet power saving modes, and Energy Efficient Ethernet (EEE) mode (defined in IEEE 802.3az), to minimize system power consumption. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 62 ++++++++++++++++++- 1 file changed, 61 insertions(+), 1 deletion(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index a14f099a1ccc..2676436278fb 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -2,6 +2,7 @@ * Platform driver for the Realtek RTL8367R-VB ethernet switches * * Copyright (C) 2012 Gabor Juhos + * Copyright (C) 2017 Vitaly Chekryzhev <13hakta@gmail.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published @@ -235,6 +236,11 @@ #define RTL8367B_LEDGROUPMASK 0x7 #define RTL8367B_SEL_LEDRATE_MASK 0xE +#define RTL8367B_PHY_POWERSAVING_REG 21 +#define RTL8367B_PHY_POWERSAVING_OFFSET 12 +#define RTL8367B_PHY_POWERSAVING_MASK 0x1000 +#define RTL8367B_PHY_GREEN_OFFSET 6 + struct rtl8367b_initval { u16 reg; u16 val; @@ -1313,6 +1319,53 @@ static int rtl8367b_sw_set_led(struct switch_dev *dev, return rtl8367b_led_group_set_mode(smi, 0, val->value.i); } +static int rtl8367b_sw_get_green(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + u32 data; + int err; + + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + /* Read green flag */ + REG_RD(smi, RTL8367B_REG_PHY_AD, &data); + + val->value.i = ((data & BIT(RTL8367B_PHY_GREEN_OFFSET)) >> RTL8367B_PHY_GREEN_OFFSET == 1)? 1 : 0; + + return 0; +} + +static int rtl8367b_sw_set_green(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + int i, err; + u32 data; + + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + if (val->value.i > 1) + return -EINVAL; + + REG_RMW(smi, + RTL8367B_REG_PHY_AD, + BIT(RTL8367B_PHY_GREEN_OFFSET), + val->value.i << RTL8367B_PHY_GREEN_OFFSET); + + /* Set green mode for all PHY ports */ + for (i = 0; i < RTL8367B_PHY_MAX; i++) { + rtl8367b_port_phy_reg_get(smi, i, RTL8367B_PHY_POWERSAVING_REG, &data); + + data = (data & (~RTL8367B_PHY_POWERSAVING_MASK)) | (val->value.i << + RTL8367B_PHY_POWERSAVING_OFFSET); + + rtl8367b_port_phy_reg_set(smi, i, RTL8367B_PHY_POWERSAVING_REG, data); + } + + return 0; +} + static int rtl8367b_sw_reset_port_mibs(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) @@ -1372,7 +1425,14 @@ static struct switch_attr rtl8367b_globals[] = { .get = rtl8367b_sw_get_led_blink, .set = rtl8367b_sw_set_led_blink, .max = 7, - } + }, { + .type = SWITCH_TYPE_INT, + .name = "green", + .description = "Set green mode (0 - disable)", + .get = rtl8367b_sw_get_green, + .set = rtl8367b_sw_set_green, + .max = 1, + }, }; static struct switch_attr rtl8367b_port[] = { From 5924a59d55cab953dcc701e801e6c81dfc62aaea Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 11:39:37 +0500 Subject: [PATCH 17/49] generic: rtl8367b: add ability to disable port at runtime Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 2676436278fb..ba903215ece9 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -1381,6 +1381,37 @@ static int rtl8367b_sw_reset_port_mibs(struct switch_dev *dev, RTL8367B_MIB_CTRL0_PORT_RESET_MASK(port % 8)); } +static int rtl8367b_sw_set_port_disable(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + if (val->port_vlan > RTL8367B_PHY_MAX) + return -EINVAL; + + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + return rtl8367b_enable_port(smi, val->port_vlan, 1 - val->value.i); +} + +static int rtl8367b_sw_get_port_disable(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + int err; + u32 data; + + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + if (val->port_vlan > RTL8367B_PHY_MAX) + return -EINVAL; + + err = rtl8367b_port_phy_reg_get(smi, val->port_vlan, 0, &data); + + val->value.i = ((data & (1 << 11)) >> 11); + + return 0; +} + static struct switch_attr rtl8367b_globals[] = { { .type = SWITCH_TYPE_INT, @@ -1448,6 +1479,13 @@ static struct switch_attr rtl8367b_port[] = { .max = 33, .set = NULL, .get = rtl8366_sw_get_port_mib, + }, { + .type = SWITCH_TYPE_INT, + .name = "disable", + .description = "Get/Set port state (enabled or disabled)", + .max = 1, + .set = rtl8367b_sw_set_port_disable, + .get = rtl8367b_sw_get_port_disable, }, }; From a40903fdf851c8136b95561f7f5d195cdc16b068 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Sat, 17 Dec 2016 15:13:06 +0100 Subject: [PATCH 18/49] generic: rtl8366_smi: fix code format Fix indentation, add missing linebreaks and remove superfluous linebreaks. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8366_smi.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c index b8cdf30de48c..464e4d254259 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c @@ -608,8 +608,8 @@ int rtl8366_debugfs_open(struct inode *inode, struct file *file) EXPORT_SYMBOL_GPL(rtl8366_debugfs_open); static ssize_t rtl8366_read_debugfs_vlan_mc(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) + char __user *user_buf, + size_t count, loff_t *ppos) { struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data; int i, len = 0; @@ -699,8 +699,8 @@ static ssize_t rtl8366_read_debugfs_pvid(struct file *file, } static ssize_t rtl8366_read_debugfs_reg(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) + char __user *user_buf, + size_t count, loff_t *ppos) { struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data; u32 t, reg = smi->dbg_reg; @@ -723,8 +723,8 @@ static ssize_t rtl8366_read_debugfs_reg(struct file *file, } static ssize_t rtl8366_write_debugfs_reg(struct file *file, - const char __user *user_buf, - size_t count, loff_t *ppos) + const char __user *user_buf, + size_t count, loff_t *ppos) { struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data; unsigned long data; @@ -870,7 +870,7 @@ static void rtl8366_debugfs_init(struct rtl8366_smi *smi) } node = debugfs_create_u8("vlan_4k_page", S_IRUGO | S_IWUSR, root, - &smi->dbg_vlan_4k_page); + &smi->dbg_vlan_4k_page); if (!node) { dev_err(smi->parent, "Creating debugfs file '%s' failed\n", "vlan_4k_page"); @@ -1423,7 +1423,6 @@ int rtl8366_smi_probe_plat(struct platform_device *pdev, struct rtl8366_smi *smi return 0; } - struct rtl8366_smi *rtl8366_smi_probe(struct platform_device *pdev) { struct rtl8366_smi *smi; From 585f8ca8a0a7e5d1ada66248f0ed2820a1ad9e01 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 13:00:19 +0500 Subject: [PATCH 19/49] generic: rtl8366_smi: move definitions to header Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8366_smi.c | 5 ----- target/linux/generic/files/drivers/net/phy/rtl8366_smi.h | 5 +++++ 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c index 464e4d254259..57862e7d702d 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c @@ -27,11 +27,6 @@ #include "rtl8366_smi.h" -#define RTL8366_SMI_ACK_RETRY_COUNT 5 - -#define RTL8366_SMI_HW_STOP_DELAY 25 /* msecs */ -#define RTL8366_SMI_HW_START_DELAY 100 /* msecs */ - static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi) { ndelay(smi->clk_delay); diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h index 1100b3d21edf..018656640811 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h @@ -15,6 +15,11 @@ #include #include +#define RTL8366_SMI_ACK_RETRY_COUNT 5 + +#define RTL8366_SMI_HW_STOP_DELAY 25 /* msecs */ +#define RTL8366_SMI_HW_START_DELAY 100 /* msecs */ + struct rtl8366_smi_ops; struct rtl8366_vlan_ops; struct mii_bus; From b947c0b01db554f649f476f5a62239d0dfc7cadf Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 13:02:13 +0500 Subject: [PATCH 20/49] generic: rtl8366_smi: move delay method to header and convert it to macro Convert method to macro slightly improves performance. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8366_smi.c | 5 ----- target/linux/generic/files/drivers/net/phy/rtl8366_smi.h | 2 ++ 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c index 57862e7d702d..96d6177c00fc 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c @@ -27,11 +27,6 @@ #include "rtl8366_smi.h" -static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi) -{ - ndelay(smi->clk_delay); -} - static void rtl8366_smi_start(struct rtl8366_smi *smi) { unsigned int sda = smi->gpio_sda; diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h index 018656640811..aede808b56b4 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h @@ -20,6 +20,8 @@ #define RTL8366_SMI_HW_STOP_DELAY 25 /* msecs */ #define RTL8366_SMI_HW_START_DELAY 100 /* msecs */ +#define rtl8366_smi_clk_delay(smi) ndelay(smi->clk_delay) + struct rtl8366_smi_ops; struct rtl8366_vlan_ops; struct mii_bus; From 659118bd6e0e8e4e4a2f822a297d597c7db9c64a Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 13:06:58 +0500 Subject: [PATCH 21/49] generic: rtl8366_smi: add direct MDIO support Switches support two management modes: GPIO driven/MDIO, while MDIO support was missing. Workaround methods to add direct MDIO support. Extend 'rtl8366_smi' struct with mdio_enabled flag. Flag is set if 'mdio' property was found in devicetree, otherwise switch is controlled via GPIO. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../files/drivers/net/phy/rtl8366_smi.c | 266 ++++++++++++------ .../files/drivers/net/phy/rtl8366_smi.h | 14 + 2 files changed, 201 insertions(+), 79 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c index 96d6177c00fc..e19f43898954 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c @@ -2,6 +2,7 @@ * Realtek RTL8366 SMI interface driver * * Copyright (C) 2009-2010 Gabor Juhos + * Copyright (C) 2017 Vitaly Chekryzhev <13hakta@gmail.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published @@ -18,6 +19,7 @@ #include #include #include +#include #include #include @@ -197,34 +199,71 @@ int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data) spin_lock_irqsave(&smi->lock, flags); - rtl8366_smi_start(smi); + if (smi->mdio_enabled) { + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* send READ command */ - ret = rtl8366_smi_write_byte(smi, smi->cmd_read); - if (ret) - goto out; + /* Write address control code to register 31 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_CTRL0_REG, MDC_MDIO_ADDR_OP); - /* set ADDR[7:0] */ - ret = rtl8366_smi_write_byte(smi, addr & 0xff); - if (ret) - goto out; + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* set ADDR[15:8] */ - ret = rtl8366_smi_write_byte(smi, addr >> 8); - if (ret) - goto out; + /* Write address to register 23 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_ADDRESS_REG, addr); + + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* read DATA[7:0] */ - rtl8366_smi_read_byte0(smi, &lo); - /* read DATA[15:8] */ - rtl8366_smi_read_byte1(smi, &hi); + /* Write read control code to register 21 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_CTRL1_REG, MDC_MDIO_READ_OP); - *data = ((u32) lo) | (((u32) hi) << 8); + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - ret = 0; + /* Read data from register 25 */ + *data = smi->mii_bus->read(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_DATA_READ_REG); + + ret = (*data == 0xffff) ? 1 : 0; + } else { + rtl8366_smi_start(smi); + + /* send READ command */ + ret = rtl8366_smi_write_byte(smi, smi->cmd_read); + if (ret) + goto out; + + /* set ADDR[7:0] */ + ret = rtl8366_smi_write_byte(smi, addr & 0xff); + if (ret) + goto out; + + /* set ADDR[15:8] */ + ret = rtl8366_smi_write_byte(smi, addr >> 8); + if (ret) + goto out; + + /* read DATA[7:0] */ + rtl8366_smi_read_byte0(smi, &lo); + /* read DATA[15:8] */ + rtl8366_smi_read_byte1(smi, &hi); + + *data = ((u32) lo) | (((u32) hi) << 8); + + ret = 0; + +out: + rtl8366_smi_stop(smi); + } - out: - rtl8366_smi_stop(smi); spin_unlock_irqrestore(&smi->lock, flags); return ret; @@ -239,40 +278,77 @@ static int __rtl8366_smi_write_reg(struct rtl8366_smi *smi, spin_lock_irqsave(&smi->lock, flags); - rtl8366_smi_start(smi); + if (smi->mdio_enabled) { + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* send WRITE command */ - ret = rtl8366_smi_write_byte(smi, smi->cmd_write); - if (ret) - goto out; + /* Write address control code to register 31 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_CTRL0_REG, MDC_MDIO_ADDR_OP); - /* set ADDR[7:0] */ - ret = rtl8366_smi_write_byte(smi, addr & 0xff); - if (ret) - goto out; + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* set ADDR[15:8] */ - ret = rtl8366_smi_write_byte(smi, addr >> 8); - if (ret) - goto out; + /* Write address to register 23 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_ADDRESS_REG, addr); - /* write DATA[7:0] */ - ret = rtl8366_smi_write_byte(smi, data & 0xff); - if (ret) - goto out; + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* write DATA[15:8] */ - if (ack) - ret = rtl8366_smi_write_byte(smi, data >> 8); - else - ret = rtl8366_smi_write_byte_noack(smi, data >> 8); - if (ret) - goto out; + /* Write data to register 24 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_DATA_WRITE_REG, data); + + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); + + /* Write data control code to register 21 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_CTRL1_REG, MDC_MDIO_WRITE_OP); + + ret = 0; + } else { + rtl8366_smi_start(smi); + + /* send WRITE command */ + ret = rtl8366_smi_write_byte(smi, smi->cmd_write); + if (ret) + goto out; + + /* set ADDR[7:0] */ + ret = rtl8366_smi_write_byte(smi, addr & 0xff); + if (ret) + goto out; + + /* set ADDR[15:8] */ + ret = rtl8366_smi_write_byte(smi, addr >> 8); + if (ret) + goto out; + + /* write DATA[7:0] */ + ret = rtl8366_smi_write_byte(smi, data & 0xff); + if (ret) + goto out; + + /* write DATA[15:8] */ + if (ack) + ret = rtl8366_smi_write_byte(smi, data >> 8); + else + ret = rtl8366_smi_write_byte_noack(smi, data >> 8); + if (ret) + goto out; - ret = 0; + ret = 0; + +out: + rtl8366_smi_stop(smi); + } - out: - rtl8366_smi_stop(smi); spin_unlock_irqrestore(&smi->lock, flags); return ret; @@ -905,6 +981,24 @@ static inline void rtl8366_debugfs_remove(struct rtl8366_smi *smi) {} static int rtl8366_smi_mii_init(struct rtl8366_smi *smi) { int ret; + int i; + struct mii_bus *bus; + struct device_node *np; + + if (smi->mdio_enabled) { + np = of_parse_phandle(smi->parent->of_node, "mdio", 0); + + if (np) { + bus = of_mdio_find_bus(np); + + if (bus) { + smi->mii_bus = bus; + return 0; + } else + return -EPROBE_DEFER; + } else + return -ENODEV; + } smi->mii_bus = mdiobus_alloc(); if (smi->mii_bus == NULL) { @@ -943,8 +1037,10 @@ static int rtl8366_smi_mii_init(struct rtl8366_smi *smi) static void rtl8366_smi_mii_cleanup(struct rtl8366_smi *smi) { - mdiobus_unregister(smi->mii_bus); - mdiobus_free(smi->mii_bus); + if (!smi->mdio_enabled) { + mdiobus_unregister(smi->mii_bus); + mdiobus_free(smi->mii_bus); + } } int rtl8366_sw_reset_switch(struct switch_dev *dev) @@ -1232,21 +1328,23 @@ static int __rtl8366_smi_init(struct rtl8366_smi *smi, const char *name) { int err; - err = gpio_request(smi->gpio_sda, name); - if (err) { - printk(KERN_ERR "rtl8366_smi: gpio_request failed for %u, err=%d\n", - smi->gpio_sda, err); - goto err_out; - } + if (!smi->mdio_enabled) { + err = gpio_request(smi->gpio_sda, name); + if (err) { + printk(KERN_ERR "rtl8366_smi: gpio_request failed for %u, err=%d\n", + smi->gpio_sda, err); + goto err_out; + } - err = gpio_request(smi->gpio_sck, name); - if (err) { - printk(KERN_ERR "rtl8366_smi: gpio_request failed for %u, err=%d\n", - smi->gpio_sck, err); - goto err_free_sda; - } + err = gpio_request(smi->gpio_sck, name); + if (err) { + printk(KERN_ERR "rtl8366_smi: gpio_request failed for %u, err=%d\n", + smi->gpio_sck, err); + goto err_free_sda; + } - spin_lock_init(&smi->lock); + spin_lock_init(&smi->lock); + } /* start the switch */ if (smi->hw_reset) { @@ -1267,8 +1365,10 @@ static void __rtl8366_smi_cleanup(struct rtl8366_smi *smi) if (smi->hw_reset) smi->hw_reset(true); - gpio_free(smi->gpio_sck); - gpio_free(smi->gpio_sda); + if (!smi->mdio_enabled) { + gpio_free(smi->gpio_sck); + gpio_free(smi->gpio_sda); + } } enum rtl8366_type rtl8366_smi_detect(struct rtl8366_platform_data *pdata) @@ -1321,8 +1421,15 @@ int rtl8366_smi_init(struct rtl8366_smi *smi) if (err) goto err_out; - dev_info(smi->parent, "using GPIO pins %u (SDA) and %u (SCK)\n", - smi->gpio_sda, smi->gpio_sck); + err = rtl8366_smi_mii_init(smi); + if (err) + goto err_free_sck; + + if (smi->mdio_enabled) + dev_info(smi->parent, "using bus %s\n", smi->mii_bus->name); + else + dev_info(smi->parent, "using GPIO pins %u (SDA) and %u (SCK)\n", + smi->gpio_sda, smi->gpio_sck); err = smi->ops->detect(smi); if (err) { @@ -1351,10 +1458,6 @@ int rtl8366_smi_init(struct rtl8366_smi *smi) if (err) goto err_free_sck; - err = rtl8366_smi_mii_init(smi); - if (err) - goto err_free_sck; - rtl8366_debugfs_init(smi); return 0; @@ -1377,16 +1480,20 @@ EXPORT_SYMBOL_GPL(rtl8366_smi_cleanup); #ifdef CONFIG_OF int rtl8366_smi_probe_of(struct platform_device *pdev, struct rtl8366_smi *smi) { - int sck = of_get_named_gpio(pdev->dev.of_node, "gpio-sck", 0); - int sda = of_get_named_gpio(pdev->dev.of_node, "gpio-sda", 0); + smi->mdio_enabled = of_property_read_bool(pdev->dev.of_node, "mdio"); - if (!gpio_is_valid(sck) || !gpio_is_valid(sda)) { - dev_err(&pdev->dev, "gpios missing in devictree\n"); - return -EINVAL; - } + if (!smi->mdio_enabled) { + int sck = of_get_named_gpio(pdev->dev.of_node, "gpio-sck", 0); + int sda = of_get_named_gpio(pdev->dev.of_node, "gpio-sda", 0); + + if (!gpio_is_valid(sck) || !gpio_is_valid(sda)) { + dev_err(&pdev->dev, "gpios missing in devictree\n"); + return -EINVAL; + } - smi->gpio_sda = sda; - smi->gpio_sck = sck; + smi->gpio_sda = sda; + smi->gpio_sck = sck; + } return 0; } @@ -1406,6 +1513,7 @@ int rtl8366_smi_probe_plat(struct platform_device *pdev, struct rtl8366_smi *smi return -EINVAL; } + smi->mdio_enabled = false; smi->gpio_sda = pdata->gpio_sda; smi->gpio_sck = pdata->gpio_sck; smi->hw_reset = pdata->hw_reset; diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h index aede808b56b4..bbf619ad1c17 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h @@ -15,6 +15,19 @@ #include #include +#define RTL_MDIO_PHYID 0 +#define MDC_MDIO_CTRL0_REG 31 +#define MDC_MDIO_START_REG 29 +#define MDC_MDIO_CTRL1_REG 21 +#define MDC_MDIO_ADDRESS_REG 23 +#define MDC_MDIO_DATA_WRITE_REG 24 +#define MDC_MDIO_DATA_READ_REG 25 + +#define MDC_MDIO_START_OP 0xFFFF +#define MDC_MDIO_ADDR_OP 0x000E +#define MDC_MDIO_READ_OP 0x0001 +#define MDC_MDIO_WRITE_OP 0x0003 + #define RTL8366_SMI_ACK_RETRY_COUNT 5 #define RTL8366_SMI_HW_STOP_DELAY 25 /* msecs */ @@ -40,6 +53,7 @@ struct rtl8366_smi { struct device *parent; unsigned int gpio_sda; unsigned int gpio_sck; + bool mdio_enabled; void (*hw_reset)(bool active); unsigned int clk_delay; /* ns */ u8 cmd_read; From 3a9ae76da7f2598e02470b774584015e3b53bb17 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 23:49:41 +0500 Subject: [PATCH 22/49] ramips: update ZyXEL Keenetic Viva devicetree Remove unneeded cpu port property, update external interface init according to mapped ports for RTL8267RB: ext port #1 = extif0 ext port #2 = extif1 Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/ramips/dts/kng_rc.dts | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/linux/ramips/dts/kng_rc.dts b/target/linux/ramips/dts/kng_rc.dts index 7cd4de3fb254..baaee3fd59f6 100644 --- a/target/linux/ramips/dts/kng_rc.dts +++ b/target/linux/ramips/dts/kng_rc.dts @@ -75,8 +75,7 @@ rtl8367rb { compatible = "realtek,rtl8367b"; - cpu_port = <7>; - realtek,extif2 = <1 0 1 1 1 1 1 1 2>; + realtek,extif1 = <1 0 1 1 1 1 1 1 2>; mdio = <&mdio0>; }; }; From 4f1ca5416db8d171edf9f290bf2c731526ed59a5 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 16 Feb 2017 12:46:21 +0500 Subject: [PATCH 23/49] ramips: DIR-645 fix switch external port in devicetree According to external interface mapping extif1 on RTL8367RB becomes extif0. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/ramips/dts/DIR-645.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/ramips/dts/DIR-645.dts b/target/linux/ramips/dts/DIR-645.dts index 9c8082ca2443..64f0de53ff15 100644 --- a/target/linux/ramips/dts/DIR-645.dts +++ b/target/linux/ramips/dts/DIR-645.dts @@ -12,7 +12,7 @@ compatible = "realtek,rtl8367b"; gpio-sda = <&gpio0 1 0>; gpio-sck = <&gpio0 2 0>; - realtek,extif1 = <1 0 1 1 1 1 1 1 2>; + realtek,extif0 = <1 0 1 1 1 1 1 1 2>; }; gpio-keys-polled { From de653f47adc8e9d4189434cd775f7c140e7cee76 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Sun, 19 Feb 2017 20:22:38 +0500 Subject: [PATCH 24/49] generic: rtl8366_smi: debug Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8366_smi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c index e19f43898954..463fa3df41dc 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c @@ -534,9 +534,12 @@ static int rtl8366_set_pvid(struct rtl8366_smi *smi, unsigned port, if (!used) { /* Update the entry from the 4K table */ + dev_info(smi->parent, "get VLAN 4K vid:%d\n", vid); err = smi->ops->get_vlan_4k(smi, vid, &vlan4k); - if (err) + if (err) { + dev_err(smi->parent, "PVID #%d vid:%d\n", err, vid); return err; + } vlanmc.vid = vid; vlanmc.member = vlan4k.member; From f6ad5ace8eb0ca3c45e49f242f02e901507dd6e6 Mon Sep 17 00:00:00 2001 From: Quallenauge Date: Thu, 9 Mar 2017 23:33:32 +0100 Subject: [PATCH 25/49] rtl8366_smi: Exclude cpu port from pvid initialization. It causes errors when probing the device. --- target/linux/generic/files/drivers/net/phy/rtl8366_smi.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c index 463fa3df41dc..e146e27eb0f3 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c @@ -660,9 +660,11 @@ static int rtl8366_init_vlan(struct rtl8366_smi *smi) if (err) return err; - err = rtl8366_set_pvid(smi, port, (port + 1)); - if (err) - return err; + if (port != smi->cpu_port) { + err = rtl8366_set_pvid(smi, port, (port + 1)); + if (err) + return err; + } } return rtl8366_enable_vlan(smi, 1); From 6e1ccf096b76043b8d40e95e4e52e0e591a86631 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 16 Dec 2016 18:18:34 +0500 Subject: [PATCH 26/49] generic: rtl8367b: fix code format Fix indentation and remove superfluous linebreaks. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 99 +++++++++---------- 1 file changed, 49 insertions(+), 50 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index a73e35ed2d1c..39ccb21b3c61 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -43,7 +43,7 @@ #define RTL8367B_TA_CTRL_REG 0x0500 /*GOOD*/ #define RTL8367B_TA_CTRL_SPA_SHIFT 8 #define RTL8367B_TA_CTRL_SPA_MASK 0x7 -#define RTL8367B_TA_CTRL_METHOD BIT(4)/*GOOD*/ +#define RTL8367B_TA_CTRL_METHOD BIT(4) /*GOOD*/ #define RTL8367B_TA_CTRL_CMD_SHIFT 3 #define RTL8367B_TA_CTRL_CMD_READ 0 #define RTL8367B_TA_CTRL_CMD_WRITE 1 @@ -59,12 +59,12 @@ ((RTL8367B_TA_CTRL_CMD_WRITE << RTL8367B_TA_CTRL_CMD_SHIFT) | \ RTL8367B_TA_CTRL_TABLE_CVLAN) -#define RTL8367B_TA_ADDR_REG 0x0501/*GOOD*/ -#define RTL8367B_TA_ADDR_MASK 0x3fff/*GOOD*/ +#define RTL8367B_TA_ADDR_REG 0x0501 /*GOOD*/ +#define RTL8367B_TA_ADDR_MASK 0x3fff /*GOOD*/ -#define RTL8367B_TA_LUT_REG 0x0502/*GOOD*/ +#define RTL8367B_TA_LUT_REG 0x0502 /*GOOD*/ -#define RTL8367B_TA_WRDATA_REG(_x) (0x0510 + (_x))/*GOOD*/ +#define RTL8367B_TA_WRDATA_REG(_x) (0x0510 + (_x)) /*GOOD*/ #define RTL8367B_TA_VLAN_NUM_WORDS 2 #define RTL8367B_TA_VLAN_VID_MASK RTL8367B_VID_MASK #define RTL8367B_TA_VLAN0_MEMBER_SHIFT 0 @@ -74,7 +74,7 @@ #define RTL8367B_TA_VLAN1_FID_SHIFT 0 #define RTL8367B_TA_VLAN1_FID_MASK RTL8367B_FID_MASK -#define RTL8367B_TA_RDDATA_REG(_x) (0x0520 + (_x))/*GOOD*/ +#define RTL8367B_TA_RDDATA_REG(_x) (0x0520 + (_x)) /*GOOD*/ #define RTL8367B_VLAN_PVID_CTRL_REG(_p) (0x0700 + (_p) / 2) /*GOOD*/ #define RTL8367B_VLAN_PVID_CTRL_MASK 0x1f /*GOOD*/ @@ -82,12 +82,12 @@ #define RTL8367B_VLAN_MC_BASE(_x) (0x0728 + (_x) * 4) /*GOOD*/ #define RTL8367B_VLAN_MC_NUM_WORDS 4 /*GOOD*/ -#define RTL8367B_VLAN_MC0_MEMBER_SHIFT 0/*GOOD*/ -#define RTL8367B_VLAN_MC0_MEMBER_MASK RTL8367B_MEMBER_MASK/*GOOD*/ -#define RTL8367B_VLAN_MC1_FID_SHIFT 0/*GOOD*/ -#define RTL8367B_VLAN_MC1_FID_MASK RTL8367B_FID_MASK/*GOOD*/ -#define RTL8367B_VLAN_MC3_EVID_SHIFT 0/*GOOD*/ -#define RTL8367B_VLAN_MC3_EVID_MASK RTL8367B_VID_MASK/*GOOD*/ +#define RTL8367B_VLAN_MC0_MEMBER_SHIFT 0 /*GOOD*/ +#define RTL8367B_VLAN_MC0_MEMBER_MASK RTL8367B_MEMBER_MASK /*GOOD*/ +#define RTL8367B_VLAN_MC1_FID_SHIFT 0 /*GOOD*/ +#define RTL8367B_VLAN_MC1_FID_MASK RTL8367B_FID_MASK /*GOOD*/ +#define RTL8367B_VLAN_MC3_EVID_SHIFT 0 /*GOOD*/ +#define RTL8367B_VLAN_MC3_EVID_MASK RTL8367B_VID_MASK /*GOOD*/ #define RTL8367B_VLAN_CTRL_REG 0x07a8 /*GOOD*/ #define RTL8367B_VLAN_CTRL_ENABLE BIT(0) @@ -108,8 +108,8 @@ #define RTL8367B_MIB_CTRL0_RESET_MASK BIT(1) /*GOOD*/ #define RTL8367B_MIB_CTRL0_BUSY_MASK BIT(0) /*GOOD*/ -#define RTL8367B_SWC0_REG 0x1200/*GOOD*/ -#define RTL8367B_SWC0_MAX_LENGTH_SHIFT 13/*GOOD*/ +#define RTL8367B_SWC0_REG 0x1200 /*GOOD*/ +#define RTL8367B_SWC0_MAX_LENGTH_SHIFT 13 /*GOOD*/ #define RTL8367B_SWC0_MAX_LENGTH(_x) ((_x) << 13) /*GOOD*/ #define RTL8367B_SWC0_MAX_LENGTH_MASK RTL8367B_SWC0_MAX_LENGTH(0x3) #define RTL8367B_SWC0_MAX_LENGTH_1522 RTL8367B_SWC0_MAX_LENGTH(0) @@ -117,17 +117,17 @@ #define RTL8367B_SWC0_MAX_LENGTH_1552 RTL8367B_SWC0_MAX_LENGTH(2) #define RTL8367B_SWC0_MAX_LENGTH_16000 RTL8367B_SWC0_MAX_LENGTH(3) -#define RTL8367B_CHIP_NUMBER_REG 0x1300/*GOOD*/ +#define RTL8367B_CHIP_NUMBER_REG 0x1300 /*GOOD*/ -#define RTL8367B_CHIP_VER_REG 0x1301/*GOOD*/ -#define RTL8367B_CHIP_VER_RLVID_SHIFT 12/*GOOD*/ -#define RTL8367B_CHIP_VER_RLVID_MASK 0xf/*GOOD*/ -#define RTL8367B_CHIP_VER_MCID_SHIFT 8/*GOOD*/ -#define RTL8367B_CHIP_VER_MCID_MASK 0xf/*GOOD*/ -#define RTL8367B_CHIP_VER_BOID_SHIFT 4/*GOOD*/ -#define RTL8367B_CHIP_VER_BOID_MASK 0xf/*GOOD*/ -#define RTL8367B_CHIP_VER_AFE_SHIFT 0/*GOOD*/ -#define RTL8367B_CHIP_VER_AFE_MASK 0x1/*GOOD*/ +#define RTL8367B_CHIP_VER_REG 0x1301 /*GOOD*/ +#define RTL8367B_CHIP_VER_RLVID_SHIFT 12 /*GOOD*/ +#define RTL8367B_CHIP_VER_RLVID_MASK 0xf /*GOOD*/ +#define RTL8367B_CHIP_VER_MCID_SHIFT 8 /*GOOD*/ +#define RTL8367B_CHIP_VER_MCID_MASK 0xf /*GOOD*/ +#define RTL8367B_CHIP_VER_BOID_SHIFT 4 /*GOOD*/ +#define RTL8367B_CHIP_VER_BOID_MASK 0xf /*GOOD*/ +#define RTL8367B_CHIP_VER_AFE_SHIFT 0 /*GOOD*/ +#define RTL8367B_CHIP_VER_AFE_MASK 0x1 /*GOOD*/ #define RTL8367B_CHIP_MODE_REG 0x1302 #define RTL8367B_CHIP_MODE_MASK 0x7 @@ -169,18 +169,18 @@ #define RTL8367B_PORT_STATUS_REG(_p) (0x1352 + (_p)) /*GOOD*/ #define RTL8367B_PORT_STATUS_EN_1000_SPI BIT(11) /*GOOD*/ -#define RTL8367B_PORT_STATUS_EN_100_SPI BIT(10)/*GOOD*/ -#define RTL8367B_PORT_STATUS_NWAY_FAULT BIT(9)/*GOOD*/ -#define RTL8367B_PORT_STATUS_LINK_MASTER BIT(8)/*GOOD*/ -#define RTL8367B_PORT_STATUS_NWAY BIT(7)/*GOOD*/ -#define RTL8367B_PORT_STATUS_TXPAUSE BIT(6)/*GOOD*/ -#define RTL8367B_PORT_STATUS_RXPAUSE BIT(5)/*GOOD*/ -#define RTL8367B_PORT_STATUS_LINK BIT(4)/*GOOD*/ -#define RTL8367B_PORT_STATUS_DUPLEX BIT(2)/*GOOD*/ -#define RTL8367B_PORT_STATUS_SPEED_MASK 0x0003/*GOOD*/ -#define RTL8367B_PORT_STATUS_SPEED_10 0/*GOOD*/ -#define RTL8367B_PORT_STATUS_SPEED_100 1/*GOOD*/ -#define RTL8367B_PORT_STATUS_SPEED_1000 2/*GOOD*/ +#define RTL8367B_PORT_STATUS_EN_100_SPI BIT(10) /*GOOD*/ +#define RTL8367B_PORT_STATUS_NWAY_FAULT BIT(9) /*GOOD*/ +#define RTL8367B_PORT_STATUS_LINK_MASTER BIT(8) /*GOOD*/ +#define RTL8367B_PORT_STATUS_NWAY BIT(7) /*GOOD*/ +#define RTL8367B_PORT_STATUS_TXPAUSE BIT(6) /*GOOD*/ +#define RTL8367B_PORT_STATUS_RXPAUSE BIT(5) /*GOOD*/ +#define RTL8367B_PORT_STATUS_LINK BIT(4) /*GOOD*/ +#define RTL8367B_PORT_STATUS_DUPLEX BIT(2) /*GOOD*/ +#define RTL8367B_PORT_STATUS_SPEED_MASK 0x0003 /*GOOD*/ +#define RTL8367B_PORT_STATUS_SPEED_10 0 /*GOOD*/ +#define RTL8367B_PORT_STATUS_SPEED_100 1 /*GOOD*/ +#define RTL8367B_PORT_STATUS_SPEED_1000 2 /*GOOD*/ #define RTL8367B_RTL_MAGIC_ID_REG 0x13c2 #define RTL8367B_RTL_MAGIC_ID_VAL 0x0249 @@ -575,8 +575,8 @@ static const struct rtl8367b_initval rtl8367r_vb_initvals_1[] = { }; static int rtl8367b_write_initvals(struct rtl8366_smi *smi, - const struct rtl8367b_initval *initvals, - int count) + const struct rtl8367b_initval *initvals, + int count) { int err; int i; @@ -588,7 +588,7 @@ static int rtl8367b_write_initvals(struct rtl8366_smi *smi, } static int rtl8367b_read_phy_reg(struct rtl8366_smi *smi, - u32 phy_addr, u32 phy_reg, u32 *val) + u32 phy_addr, u32 phy_reg, u32 *val) { int timeout; u32 data; @@ -635,7 +635,7 @@ static int rtl8367b_read_phy_reg(struct rtl8366_smi *smi, } static int rtl8367b_write_phy_reg(struct rtl8366_smi *smi, - u32 phy_addr, u32 phy_reg, u32 val) + u32 phy_addr, u32 phy_reg, u32 val) { int timeout; u32 data; @@ -818,7 +818,7 @@ static int rtl8367b_extif_set_force(struct rtl8366_smi *smi, int id, } static int rtl8367b_extif_set_rgmii_delay(struct rtl8366_smi *smi, int id, - unsigned txdelay, unsigned rxdelay) + unsigned txdelay, unsigned rxdelay) { u32 mask; u32 val; @@ -1122,7 +1122,7 @@ static int rtl8367b_set_vlan_mc(struct rtl8366_smi *smi, u32 index, RTL8367B_VLAN_MC1_FID_SHIFT; data[2] = 0; data[3] = (vlanmc->vid & RTL8367B_VLAN_MC3_EVID_MASK) << - RTL8367B_VLAN_MC3_EVID_SHIFT; + RTL8367B_VLAN_MC3_EVID_SHIFT; for (i = 0; i < ARRAY_SIZE(data); i++) REG_WR(smi, RTL8367B_VLAN_MC_BASE(index) + i, data[i]); @@ -1204,8 +1204,8 @@ static int rtl8367b_sw_reset_mibs(struct switch_dev *dev, } static int rtl8367b_sw_get_port_link(struct switch_dev *dev, - int port, - struct switch_port_link *link) + int port, + struct switch_port_link *link) { struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); u32 data = 0; @@ -1245,8 +1245,8 @@ static int rtl8367b_sw_get_port_link(struct switch_dev *dev, } static int rtl8367b_sw_get_max_length(struct switch_dev *dev, - const struct switch_attr *attr, - struct switch_val *val) + const struct switch_attr *attr, + struct switch_val *val) { struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); u32 data; @@ -1259,8 +1259,8 @@ static int rtl8367b_sw_get_max_length(struct switch_dev *dev, } static int rtl8367b_sw_set_max_length(struct switch_dev *dev, - const struct switch_attr *attr, - struct switch_val *val) + const struct switch_attr *attr, + struct switch_val *val) { struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); u32 max_len; @@ -1510,7 +1510,7 @@ static struct rtl8366_smi_ops rtl8367b_smi_ops = { .enable_port = rtl8367b_enable_port, }; -static int rtl8367b_probe(struct platform_device *pdev) +static int rtl8367b_probe(struct platform_device *pdev) { struct rtl8366_smi *smi; int err; @@ -1599,4 +1599,3 @@ MODULE_DESCRIPTION("Realtek RTL8367B ethernet switch driver"); MODULE_AUTHOR("Gabor Juhos "); MODULE_LICENSE("GPL v2"); MODULE_ALIAS("platform:" RTL8367B_DRIVER_NAME); - From 8967185478ebdf895cf3979e478e9609520ce9e9 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 10 Feb 2017 12:37:53 +0500 Subject: [PATCH 27/49] generic: rtl8366_smi/rtl8367b: update chip detection Extend rtl8366_smi with chip_ver field for storing chip ID. Useful for drivers supporting multiple chip versions. Replace method calls with macro. Receive chip number and mode only if detection error occured. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../files/drivers/net/phy/rtl8366_smi.h | 1 + .../generic/files/drivers/net/phy/rtl8367b.c | 43 +++++++------------ 2 files changed, 17 insertions(+), 27 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h index bd41385bed1a..1100b3d21edf 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h @@ -41,6 +41,7 @@ struct rtl8366_smi { struct mii_bus *mii_bus; int mii_irq[PHY_MAX_ADDR]; struct switch_dev sw_dev; + unsigned int chip_ver; unsigned int cpu_port; unsigned int num_ports; diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 39ccb21b3c61..3e240ac5aa3e 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -1443,41 +1443,28 @@ static int rtl8367b_detect(struct rtl8366_smi *smi) u32 chip_num; u32 chip_ver; u32 chip_mode; - int ret; - - /* TODO: improve chip detection */ - rtl8366_smi_write_reg(smi, RTL8367B_RTL_MAGIC_ID_REG, - RTL8367B_RTL_MAGIC_ID_VAL); + int err; - ret = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_NUMBER_REG, &chip_num); - if (ret) { - dev_err(smi->parent, "unable to read %s register\n", - "chip number"); - return ret; - } + REG_WR(smi, RTL8367B_RTL_MAGIC_ID_REG, RTL8367B_RTL_MAGIC_ID_VAL); - ret = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_VER_REG, &chip_ver); - if (ret) { + err = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_VER_REG, &chip_ver); + if (err) { dev_err(smi->parent, "unable to read %s register\n", "chip version"); - return ret; - } - - ret = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_MODE_REG, &chip_mode); - if (ret) { - dev_err(smi->parent, "unable to read %s register\n", - "chip mode"); - return ret; + return err; } switch (chip_ver) { - case 0x1000: - chip_name = "8367RB"; - break; - case 0x1010: - chip_name = "8367R-VB"; - break; + case 0x1000: + chip_name = "8367RB"; + break; + case 0x1010: + chip_name = "8367R-VB"; + break; default: + REG_RD(smi, RTL8367B_CHIP_NUMBER_REG, &chip_num); + REG_RD(smi, RTL8367B_CHIP_MODE_REG, &chip_mode); + dev_err(smi->parent, "unknown chip num:%04x ver:%04x, mode:%04x\n", chip_num, chip_ver, chip_mode); @@ -1486,6 +1473,8 @@ static int rtl8367b_detect(struct rtl8366_smi *smi) dev_info(smi->parent, "RTL%s chip found\n", chip_name); + smi->chip_ver = chip_ver; + return 0; } From e97d83da584b791a5d39b44df7e3483853803ef3 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 10 Feb 2017 12:45:03 +0500 Subject: [PATCH 28/49] generic: rtl8367b: add cpu port detect depending on external port On chip present 2 ports, set CPU port id depending on which external port is configured. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8367b.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 3e240ac5aa3e..014066c230bd 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -857,6 +857,8 @@ static int rtl8367b_extif_init(struct rtl8366_smi *smi, int id, cfg->rxdelay); if (err) return err; + + smi->cpu_port = RTL8367B_CPU_PORT_NUM + id; } return 0; @@ -1390,7 +1392,7 @@ static int rtl8367b_switch_init(struct rtl8366_smi *smi) int err; dev->name = "RTL8367B"; - dev->cpu_port = RTL8367B_CPU_PORT_NUM; + dev->cpu_port = smi->cpu_port; dev->ports = RTL8367B_NUM_PORTS; dev->vlans = RTL8367B_NUM_VIDS; dev->ops = &rtl8367b_sw_ops; From c57b37f1291920b724da6399860274e536a88dbf Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 10 Feb 2017 12:58:34 +0500 Subject: [PATCH 29/49] generic: rtl8367b: map external ports Driver supports 2 chip versions: RTL8367RB, RTL8367R-VB. Each of them has 2 external ports. RTL8367RB has ports indexed as #1,#2 (PHY #6, #7). RTL8367R-VB has ports indexed as #0,#1 (PHY #5,#6). Map ports so that extif0 complies to external port 0 or 1 depending on chip ID. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8367b.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 014066c230bd..0d19a2bc44e8 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -844,6 +844,10 @@ static int rtl8367b_extif_init(struct rtl8366_smi *smi, int id, mode = (cfg) ? cfg->mode : RTL8367_EXTIF_MODE_DISABLED; + /* Map external port ID. V-RB has ext ports: 0,1; RB: 1,2 */ + if (smi->chip_ver == 0x1000) + id++; + err = rtl8367b_extif_set_mode(smi, id, mode); if (err) return err; From a14d75e010dc979bb2a57f683e5e40f5d00b1c58 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 10 Feb 2017 09:03:04 +0500 Subject: [PATCH 30/49] generic: rtl8367b: fix and improve initvals write Previously rlvid was wrongly converted and for different chip (0x1000, 0x1010) it was equal 1 what caused loading improper values to RTL8367RB switch. Load initvals depending on raw chip ID. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 33 +++++++------------ 1 file changed, 12 insertions(+), 21 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 0d19a2bc44e8..d4814e39ffa1 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -685,31 +685,22 @@ static int rtl8367b_write_phy_reg(struct rtl8366_smi *smi, static int rtl8367b_init_regs(struct rtl8366_smi *smi) { const struct rtl8367b_initval *initvals; - u32 chip_ver; - u32 rlvid; int count; - int err; - - REG_WR(smi, RTL8367B_RTL_MAGIC_ID_REG, RTL8367B_RTL_MAGIC_ID_VAL); - REG_RD(smi, RTL8367B_CHIP_VER_REG, &chip_ver); - rlvid = (chip_ver >> RTL8367B_CHIP_VER_RLVID_SHIFT) & - RTL8367B_CHIP_VER_RLVID_MASK; - - switch (rlvid) { - case 0: - initvals = rtl8367r_vb_initvals_0; - count = ARRAY_SIZE(rtl8367r_vb_initvals_0); - break; + switch (smi->chip_ver) { + case 0x1000: + initvals = rtl8367r_vb_initvals_0; + count = ARRAY_SIZE(rtl8367r_vb_initvals_0); + break; - case 1: - initvals = rtl8367r_vb_initvals_1; - count = ARRAY_SIZE(rtl8367r_vb_initvals_1); - break; + case 0x1010: + initvals = rtl8367r_vb_initvals_1; + count = ARRAY_SIZE(rtl8367r_vb_initvals_1); + break; - default: - dev_err(smi->parent, "unknow rlvid %u\n", rlvid); - return -ENODEV; + default: + dev_err(smi->parent, "unknown chip %u\n", smi->chip_ver); + return -ENODEV; } /* TODO: disable RLTP */ From ec1a453167bed74e0b39f8303036dff6521f8a79 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Sun, 19 Feb 2017 13:27:39 +0500 Subject: [PATCH 31/49] generic: rtl8367b: avoid isolation for nonexistent ports On RTL8367R-VB/RB chips present 2 external ports of maximum 3. Port #7 works in RGMII mode only and present only on RTL8367RB. Ports are numbered sequentially and so port #5 must be avoided as only ports 0-4,6,7 are present on board. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8367b.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index d4814e39ffa1..c439bf16a4ee 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -1148,6 +1148,17 @@ static int rtl8367b_set_mc_index(struct rtl8366_smi *smi, int port, int index) if (port >= RTL8367B_NUM_PORTS || index >= RTL8367B_NUM_VLANS) return -EINVAL; + // Skip nonexistent ports + switch (smi->chip_ver) { + case 0x1000: + if (port == 5) return 0; + break; + + case 0x1010: + if (port == 7) return 0; + break; + } + return rtl8366_smi_rmwr(smi, RTL8367B_VLAN_PVID_CTRL_REG(port), RTL8367B_VLAN_PVID_CTRL_MASK << RTL8367B_VLAN_PVID_CTRL_SHIFT(port), From 770b6214dc5b688a5c2f832c38a5a03872fd2264 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Fri, 16 Dec 2016 18:19:59 +0500 Subject: [PATCH 32/49] generic: rtl8367b: remove unused definitions Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index c439bf16a4ee..13065e8c901b 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -118,19 +118,8 @@ #define RTL8367B_SWC0_MAX_LENGTH_16000 RTL8367B_SWC0_MAX_LENGTH(3) #define RTL8367B_CHIP_NUMBER_REG 0x1300 /*GOOD*/ - #define RTL8367B_CHIP_VER_REG 0x1301 /*GOOD*/ -#define RTL8367B_CHIP_VER_RLVID_SHIFT 12 /*GOOD*/ -#define RTL8367B_CHIP_VER_RLVID_MASK 0xf /*GOOD*/ -#define RTL8367B_CHIP_VER_MCID_SHIFT 8 /*GOOD*/ -#define RTL8367B_CHIP_VER_MCID_MASK 0xf /*GOOD*/ -#define RTL8367B_CHIP_VER_BOID_SHIFT 4 /*GOOD*/ -#define RTL8367B_CHIP_VER_BOID_MASK 0xf /*GOOD*/ -#define RTL8367B_CHIP_VER_AFE_SHIFT 0 /*GOOD*/ -#define RTL8367B_CHIP_VER_AFE_MASK 0x1 /*GOOD*/ - #define RTL8367B_CHIP_MODE_REG 0x1302 -#define RTL8367B_CHIP_MODE_MASK 0x7 #define RTL8367B_CHIP_DEBUG0_REG 0x1303 #define RTL8367B_CHIP_DEBUG0_DUMMY0(_x) BIT(8 + (_x)) @@ -161,8 +150,6 @@ #define RTL8367B_DI_FORCE_SPEED_100 1 #define RTL8367B_DI_FORCE_SPEED_1000 2 -#define RTL8367B_MAC_FORCE_REG(_x) (0x1312 + (_x)) - #define RTL8367B_CHIP_RESET_REG 0x1322 /*GOOD*/ #define RTL8367B_CHIP_RESET_SW BIT(1) /*GOOD*/ #define RTL8367B_CHIP_RESET_HW BIT(0) /*GOOD*/ @@ -225,10 +212,6 @@ RTL8367B_PORT_3 | RTL8367B_PORT_4 | RTL8367B_PORT_E0 | \ RTL8367B_PORT_E1 | RTL8367B_PORT_E2) -#define RTL8367B_PORTS_ALL_BUT_CPU \ - (RTL8367B_PORT_0 | RTL8367B_PORT_1 | RTL8367B_PORT_2 | \ - RTL8367B_PORT_3 | RTL8367B_PORT_4 | RTL8367B_PORT_E1 | \ - RTL8367B_PORT_E2) struct rtl8367b_initval { u16 reg; From e8737051febb006ea5e4920d55d92aa34bd46923 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Sun, 29 Jan 2017 13:10:51 +0500 Subject: [PATCH 33/49] generic: rtl8367b: add macro hardware ports mask Macro selects by mask all hardware ports for batch operations. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8367b.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 13065e8c901b..78655d5c5a53 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -212,6 +212,9 @@ RTL8367B_PORT_3 | RTL8367B_PORT_4 | RTL8367B_PORT_E0 | \ RTL8367B_PORT_E1 | RTL8367B_PORT_E2) +#define RTL8367B_PORT_ALL_EXTERNAL \ + (RTL8367B_PORT_0 | RTL8367B_PORT_1 | RTL8367B_PORT_2 | \ + RTL8367B_PORT_3 | RTL8367B_PORT_4) struct rtl8367b_initval { u16 reg; From ef80c67ff2ef4b383f022097ae341e9cb3ea5827 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Tue, 31 Jan 2017 20:23:44 +0500 Subject: [PATCH 34/49] generic: rtl8367b: add methods to manage port state Add methods managing port abilities such as enabled, speed, green mode. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 78655d5c5a53..cf177d238369 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -22,6 +22,8 @@ #define RTL8367B_RESET_DELAY 1000 /* msecs*/ +#define RTL8367B_PHY_NO 5 +#define RTL8367B_PHY_MAX (RTL8367B_PHY_NO - 1) #define RTL8367B_PHY_ADDR_MAX 8 #define RTL8367B_PHY_REG_MAX 31 @@ -216,6 +218,10 @@ (RTL8367B_PORT_0 | RTL8367B_PORT_1 | RTL8367B_PORT_2 | \ RTL8367B_PORT_3 | RTL8367B_PORT_4) +#define RTL8367B_REG_PHY_AD 0x130f +#define RTL8367B_PDN_PHY_OFFSET 5 +#define RTL8367B_PHY_PAGE_ADDRESS 0x1F + struct rtl8367b_initval { u16 reg; u16 val; @@ -306,6 +312,12 @@ rtl8367b_mib_counters[RTL8367B_NUM_MIB_COUNTERS] = { return err; \ } while (0) +#define REG_RD_PHY(_smi, _addr, _reg, _val) \ + REG_RD(_smi, RTL8367B_INTERNAL_PHY_REG(_addr, _reg), _val); + +#define REG_WR_PHY(_smi, _addr, _reg, _val) \ + REG_WR(_smi, RTL8367B_INTERNAL_PHY_REG(_addr, _reg), _val); + static const struct rtl8367b_initval rtl8367r_vb_initvals_0[] = { {0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x0301, 0x0026}, {0x1722, 0x0E14}, {0x205F, 0x0002}, {0x2059, 0x1A00}, {0x205F, 0x0000}, {0x207F, 0x0002}, @@ -668,6 +680,42 @@ static int rtl8367b_write_phy_reg(struct rtl8366_smi *smi, return 0; } +static int rtl8367b_port_phy_reg_set( + struct rtl8366_smi *smi, + u32 phy_addr, u32 phy_reg, u32 value) +{ + int err; + + if (phy_addr > RTL8367B_PHY_ADDR_MAX) + return -EINVAL; + + if (phy_reg > RTL8367B_PHY_REG_MAX) + return -EINVAL; + + REG_WR_PHY(smi, phy_addr, RTL8367B_PHY_PAGE_ADDRESS, 0); + REG_WR_PHY(smi, phy_addr, phy_reg, value); + + return 0; +} + +static int rtl8367b_port_phy_reg_get( + struct rtl8366_smi *smi, + u32 phy_addr, u32 phy_reg, u32 *value) +{ + int err; + + if (phy_addr > RTL8367B_PHY_ADDR_MAX) + return -EINVAL; + + if (phy_reg > RTL8367B_PHY_REG_MAX) + return -EINVAL; + + REG_WR_PHY(smi, phy_addr, RTL8367B_PHY_PAGE_ADDRESS, 0); + REG_RD_PHY(smi, phy_addr, phy_reg, value); + + return 0; +} + static int rtl8367b_init_regs(struct rtl8366_smi *smi) { const struct rtl8367b_initval *initvals; From f1f52a081fea335a37ca88bbf11a5fe7b2916f0d Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Sat, 19 Nov 2016 00:45:11 +0500 Subject: [PATCH 35/49] generic: rtl8367b: fix external interfaces init Add register and masks for external port #2 Add RGMII mode support for external port #2 Rewrite method according API, fix bit with bypass line rate. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 59 +++++++------------ 1 file changed, 21 insertions(+), 38 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index cf177d238369..2eff9da5eef3 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -129,18 +129,20 @@ #define RTL8367B_CHIP_DEBUG1_REG 0x1304 #define RTL8367B_DIS_REG 0x1305 +#define RTL8367B_DIS_REG_2 0x13c3 #define RTL8367B_DIS_SKIP_MII_RXER(_x) BIT(12 + (_x)) #define RTL8367B_DIS_RGMII_SHIFT(_x) (4 * (_x)) #define RTL8367B_DIS_RGMII_MASK 0x7 +#define RTL8367B_RGMII_MASK 0xF -#define RTL8367B_EXT_RGMXF_REG(_x) (0x1306 + (_x)) +#define RTL8367B_EXT_RGMXF_REG(_x) (0x1306 + (_x) + ((_x > 1)? 0xBD : 0)) #define RTL8367B_EXT_RGMXF_DUMMY0_SHIFT 5 #define RTL8367B_EXT_RGMXF_DUMMY0_MASK 0x7ff #define RTL8367B_EXT_RGMXF_TXDELAY_SHIFT 3 #define RTL8367B_EXT_RGMXF_TXDELAY_MASK 1 #define RTL8367B_EXT_RGMXF_RXDELAY_MASK 0x7 -#define RTL8367B_DI_FORCE_REG(_x) (0x1310 + (_x)) +#define RTL8367B_DI_FORCE_REG(_x) (0x1310 + (_x) + ((_x > 1)? 0xB2 : 0)) #define RTL8367B_DI_FORCE_MODE BIT(12) #define RTL8367B_DI_FORCE_NWAY BIT(7) #define RTL8367B_DI_FORCE_TXPAUSE BIT(6) @@ -772,44 +774,25 @@ static int rtl8367b_extif_set_mode(struct rtl8366_smi *smi, int id, { int err; - /* set port mode */ - switch (mode) { - case RTL8367_EXTIF_MODE_RGMII: - case RTL8367_EXTIF_MODE_RGMII_33V: - REG_WR(smi, RTL8367B_CHIP_DEBUG0_REG, 0x0367); - REG_WR(smi, RTL8367B_CHIP_DEBUG1_REG, 0x7777); - break; - - case RTL8367_EXTIF_MODE_TMII_MAC: - case RTL8367_EXTIF_MODE_TMII_PHY: - REG_RMW(smi, RTL8367B_BYPASS_LINE_RATE_REG, - BIT((id + 1) % 2), BIT((id + 1) % 2)); - break; - - case RTL8367_EXTIF_MODE_GMII: - REG_RMW(smi, RTL8367B_CHIP_DEBUG0_REG, - RTL8367B_CHIP_DEBUG0_DUMMY0(id), - RTL8367B_CHIP_DEBUG0_DUMMY0(id)); + if (mode == RTL8367_EXTIF_MODE_GMII) REG_RMW(smi, RTL8367B_EXT_RGMXF_REG(id), BIT(6), BIT(6)); - break; - - case RTL8367_EXTIF_MODE_MII_MAC: - case RTL8367_EXTIF_MODE_MII_PHY: - case RTL8367_EXTIF_MODE_DISABLED: - REG_RMW(smi, RTL8367B_BYPASS_LINE_RATE_REG, - BIT((id + 1) % 2), 0); - REG_RMW(smi, RTL8367B_EXT_RGMXF_REG(id), BIT(6), 0); - break; - - default: - dev_err(smi->parent, - "invalid mode for external interface %d\n", id); - return -EINVAL; - } + else + if ((mode == RTL8367_EXTIF_MODE_TMII_MAC) || + (mode == RTL8367_EXTIF_MODE_TMII_PHY)) + REG_RMW(smi, RTL8367B_BYPASS_LINE_RATE_REG, + BIT(id % 2), BIT(id % 2)); + else { + REG_RMW(smi, RTL8367B_BYPASS_LINE_RATE_REG, BIT(id), 0); + REG_RMW(smi, RTL8367B_EXT_RGMXF_REG(id), BIT(6), 0); + } - REG_RMW(smi, RTL8367B_DIS_REG, - RTL8367B_DIS_RGMII_MASK << RTL8367B_DIS_RGMII_SHIFT(id), - mode << RTL8367B_DIS_RGMII_SHIFT(id)); + if (id == 0 || id == 1) + REG_RMW(smi, RTL8367B_DIS_REG, + RTL8367B_DIS_RGMII_MASK << RTL8367B_DIS_RGMII_SHIFT(id), + mode << RTL8367B_DIS_RGMII_SHIFT(id)); + else + if (id == 2) + REG_RMW(smi, RTL8367B_DIS_REG_2, RTL8367B_RGMII_MASK, mode); return 0; } From e972afb30608dca70cf8c6a660c3e5fedf3b34fb Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Tue, 31 Jan 2017 22:45:31 +0500 Subject: [PATCH 36/49] generic: rtl8367b: enable ports at initialization Force enable PHY and external ports at switch setup. Remove unused definitions and move register init to initval array. Updated only short array as due to detection bug long array never used. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8367b.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 2eff9da5eef3..6540e6562866 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -123,11 +123,6 @@ #define RTL8367B_CHIP_VER_REG 0x1301 /*GOOD*/ #define RTL8367B_CHIP_MODE_REG 0x1302 -#define RTL8367B_CHIP_DEBUG0_REG 0x1303 -#define RTL8367B_CHIP_DEBUG0_DUMMY0(_x) BIT(8 + (_x)) - -#define RTL8367B_CHIP_DEBUG1_REG 0x1304 - #define RTL8367B_DIS_REG 0x1305 #define RTL8367B_DIS_REG_2 0x13c3 #define RTL8367B_DIS_SKIP_MII_RXER(_x) BIT(12 + (_x)) @@ -571,7 +566,8 @@ static const struct rtl8367b_initval rtl8367r_vb_initvals_1[] = { {0x2206, 0x0405}, {0x220F, 0x0000}, {0x221F, 0x0000}, {0x133E, 0x000E}, {0x133F, 0x0010}, {0x13EB, 0x11BB}, {0x207F, 0x0002}, {0x2073, 0x1D22}, {0x207F, 0x0000}, {0x133F, 0x0030}, {0x133E, 0x000E}, {0x2200, 0x1340}, - {0x133E, 0x000E}, {0x133F, 0x0010}, + {0x133E, 0x000E}, {0x133F, 0x0010}, {0x1303, 0x0778}, {0x1304, 0x7777}, + {0x13E2, 0x01FE} }; static int rtl8367b_write_initvals(struct rtl8366_smi *smi, @@ -956,6 +952,9 @@ static int rtl8367b_setup(struct rtl8366_smi *smi) REG_RMW(smi, RTL8367B_SWC0_REG, RTL8367B_SWC0_MAX_LENGTH_MASK, RTL8367B_SWC0_MAX_LENGTH_1536); + /* enable all PHY (if disabled by bootstrap) */ + REG_RMW(smi, RTL8367B_REG_PHY_AD, BIT(RTL8367B_PDN_PHY_OFFSET), 0); + /* * discard VLAN tagged packets if the port is not a member of * the VLAN with which the packets is associated. From e44d941b7b10389a47cd418e61e8940f4fd64690 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 16 Feb 2017 16:07:13 +0500 Subject: [PATCH 37/49] generic: rtl8367b: fix init values for RTL8367RB chip Replace long init array for RTL8367R-VB to short array for RTL8367RB. Previously init always loaded short array for two chip models but still there is difference among them. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 247 +++--------------- 1 file changed, 38 insertions(+), 209 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 6540e6562866..38e29048ccc0 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -316,216 +316,45 @@ rtl8367b_mib_counters[RTL8367B_NUM_MIB_COUNTERS] = { REG_WR(_smi, RTL8367B_INTERNAL_PHY_REG(_addr, _reg), _val); static const struct rtl8367b_initval rtl8367r_vb_initvals_0[] = { - {0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x0301, 0x0026}, {0x1722, 0x0E14}, - {0x205F, 0x0002}, {0x2059, 0x1A00}, {0x205F, 0x0000}, {0x207F, 0x0002}, - {0x2077, 0x0000}, {0x2078, 0x0000}, {0x2079, 0x0000}, {0x207A, 0x0000}, - {0x207B, 0x0000}, {0x207F, 0x0000}, {0x205F, 0x0002}, {0x2053, 0x0000}, - {0x2054, 0x0000}, {0x2055, 0x0000}, {0x2056, 0x0000}, {0x2057, 0x0000}, - {0x205F, 0x0000}, {0x12A4, 0x110A}, {0x12A6, 0x150A}, {0x13F1, 0x0013}, - {0x13F4, 0x0010}, {0x13F5, 0x0000}, {0x0018, 0x0F00}, {0x0038, 0x0F00}, - {0x0058, 0x0F00}, {0x0078, 0x0F00}, {0x0098, 0x0F00}, {0x12B6, 0x0C02}, - {0x12B7, 0x030F}, {0x12B8, 0x11FF}, {0x12BC, 0x0004}, {0x1362, 0x0115}, - {0x1363, 0x0002}, {0x1363, 0x0000}, {0x133F, 0x0030}, {0x133E, 0x000E}, - {0x221F, 0x0007}, {0x221E, 0x002D}, {0x2218, 0xF030}, {0x221F, 0x0007}, - {0x221E, 0x0023}, {0x2216, 0x0005}, {0x2215, 0x00B9}, {0x2219, 0x0044}, - {0x2215, 0x00BA}, {0x2219, 0x0020}, {0x2215, 0x00BB}, {0x2219, 0x00C1}, - {0x2215, 0x0148}, {0x2219, 0x0096}, {0x2215, 0x016E}, {0x2219, 0x0026}, - {0x2216, 0x0000}, {0x2216, 0x0000}, {0x221E, 0x002D}, {0x2218, 0xF010}, - {0x221F, 0x0007}, {0x221E, 0x0020}, {0x2215, 0x0D00}, {0x221F, 0x0000}, - {0x221F, 0x0000}, {0x2217, 0x2160}, {0x221F, 0x0001}, {0x2210, 0xF25E}, - {0x221F, 0x0007}, {0x221E, 0x0042}, {0x2215, 0x0F00}, {0x2215, 0x0F00}, - {0x2216, 0x7408}, {0x2215, 0x0E00}, {0x2215, 0x0F00}, {0x2215, 0x0F01}, - {0x2216, 0x4000}, {0x2215, 0x0E01}, {0x2215, 0x0F01}, {0x2215, 0x0F02}, - {0x2216, 0x9400}, {0x2215, 0x0E02}, {0x2215, 0x0F02}, {0x2215, 0x0F03}, - {0x2216, 0x7408}, {0x2215, 0x0E03}, {0x2215, 0x0F03}, {0x2215, 0x0F04}, - {0x2216, 0x4008}, {0x2215, 0x0E04}, {0x2215, 0x0F04}, {0x2215, 0x0F05}, - {0x2216, 0x9400}, {0x2215, 0x0E05}, {0x2215, 0x0F05}, {0x2215, 0x0F06}, - {0x2216, 0x0803}, {0x2215, 0x0E06}, {0x2215, 0x0F06}, {0x2215, 0x0D00}, - {0x2215, 0x0100}, {0x221F, 0x0001}, {0x2210, 0xF05E}, {0x221F, 0x0000}, - {0x2217, 0x2100}, {0x221F, 0x0000}, {0x220D, 0x0003}, {0x220E, 0x0015}, - {0x220D, 0x4003}, {0x220E, 0x0006}, {0x221F, 0x0000}, {0x2200, 0x1340}, - {0x133F, 0x0010}, {0x12A0, 0x0058}, {0x12A1, 0x0058}, {0x133E, 0x000E}, - {0x133F, 0x0030}, {0x221F, 0x0000}, {0x2210, 0x0166}, {0x221F, 0x0000}, - {0x133E, 0x000E}, {0x133F, 0x0010}, {0x133F, 0x0030}, {0x133E, 0x000E}, - {0x221F, 0x0005}, {0x2205, 0xFFF6}, {0x2206, 0x0080}, {0x2205, 0x8B6E}, - {0x2206, 0x0000}, {0x220F, 0x0100}, {0x2205, 0x8000}, {0x2206, 0x0280}, - {0x2206, 0x28F7}, {0x2206, 0x00E0}, {0x2206, 0xFFF7}, {0x2206, 0xA080}, + {0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x1305, 0xC000}, {0x121E, 0x03CA}, + {0x1233, 0x0352}, {0x1234, 0x0064}, {0x1237, 0x0096}, {0x1238, 0x0078}, + {0x1239, 0x0084}, {0x123A, 0x0030}, {0x205F, 0x0002}, {0x2059, 0x1A00}, + {0x205F, 0x0000}, {0x207F, 0x0002}, {0x2077, 0x0000}, {0x2078, 0x0000}, + {0x2079, 0x0000}, {0x207A, 0x0000}, {0x207B, 0x0000}, {0x207F, 0x0000}, + {0x205F, 0x0002}, {0x2053, 0x0000}, {0x2054, 0x0000}, {0x2055, 0x0000}, + {0x2056, 0x0000}, {0x2057, 0x0000}, {0x205F, 0x0000}, {0x133F, 0x0030}, + {0x133E, 0x000E}, {0x221F, 0x0005}, {0x2205, 0x8B86}, {0x2206, 0x800E}, + {0x221F, 0x0000}, {0x133F, 0x0010}, {0x12A3, 0x2200}, {0x6107, 0xE58B}, + {0x6103, 0xA970}, {0x0018, 0x0F00}, {0x0038, 0x0F00}, {0x0058, 0x0F00}, + {0x0078, 0x0F00}, {0x0098, 0x0F00}, {0x133F, 0x0030}, {0x133E, 0x000E}, + {0x221F, 0x0005}, {0x2205, 0x8B6E}, {0x2206, 0x0000}, {0x220F, 0x0100}, + {0x2205, 0xFFF6}, {0x2206, 0x0080}, {0x2205, 0x8000}, {0x2206, 0x0280}, + {0x2206, 0x2BF7}, {0x2206, 0x00E0}, {0x2206, 0xFFF7}, {0x2206, 0xA080}, {0x2206, 0x02AE}, {0x2206, 0xF602}, {0x2206, 0x0153}, {0x2206, 0x0201}, - {0x2206, 0x6602}, {0x2206, 0x80B9}, {0x2206, 0xE08B}, {0x2206, 0x8CE1}, - {0x2206, 0x8B8D}, {0x2206, 0x1E01}, {0x2206, 0xE18B}, {0x2206, 0x8E1E}, - {0x2206, 0x01A0}, {0x2206, 0x00E7}, {0x2206, 0xAEDB}, {0x2206, 0xEEE0}, - {0x2206, 0x120E}, {0x2206, 0xEEE0}, {0x2206, 0x1300}, {0x2206, 0xEEE0}, - {0x2206, 0x2001}, {0x2206, 0xEEE0}, {0x2206, 0x2166}, {0x2206, 0xEEE0}, - {0x2206, 0xC463}, {0x2206, 0xEEE0}, {0x2206, 0xC5E8}, {0x2206, 0xEEE0}, - {0x2206, 0xC699}, {0x2206, 0xEEE0}, {0x2206, 0xC7C2}, {0x2206, 0xEEE0}, - {0x2206, 0xC801}, {0x2206, 0xEEE0}, {0x2206, 0xC913}, {0x2206, 0xEEE0}, - {0x2206, 0xCA30}, {0x2206, 0xEEE0}, {0x2206, 0xCB3E}, {0x2206, 0xEEE0}, - {0x2206, 0xDCE1}, {0x2206, 0xEEE0}, {0x2206, 0xDD00}, {0x2206, 0xEEE2}, - {0x2206, 0x0001}, {0x2206, 0xEEE2}, {0x2206, 0x0100}, {0x2206, 0xEEE4}, - {0x2206, 0x8860}, {0x2206, 0xEEE4}, {0x2206, 0x8902}, {0x2206, 0xEEE4}, - {0x2206, 0x8C00}, {0x2206, 0xEEE4}, {0x2206, 0x8D30}, {0x2206, 0xEEEA}, - {0x2206, 0x1480}, {0x2206, 0xEEEA}, {0x2206, 0x1503}, {0x2206, 0xEEEA}, - {0x2206, 0xC600}, {0x2206, 0xEEEA}, {0x2206, 0xC706}, {0x2206, 0xEE85}, - {0x2206, 0xEE00}, {0x2206, 0xEE85}, {0x2206, 0xEF00}, {0x2206, 0xEE8B}, - {0x2206, 0x6750}, {0x2206, 0xEE8B}, {0x2206, 0x6632}, {0x2206, 0xEE8A}, - {0x2206, 0xD448}, {0x2206, 0xEE8A}, {0x2206, 0xD548}, {0x2206, 0xEE8A}, - {0x2206, 0xD649}, {0x2206, 0xEE8A}, {0x2206, 0xD7F8}, {0x2206, 0xEE8B}, - {0x2206, 0x85E2}, {0x2206, 0xEE8B}, {0x2206, 0x8700}, {0x2206, 0xEEFF}, - {0x2206, 0xF600}, {0x2206, 0xEEFF}, {0x2206, 0xF7FC}, {0x2206, 0x04F8}, - {0x2206, 0xE08B}, {0x2206, 0x8EAD}, {0x2206, 0x2023}, {0x2206, 0xF620}, - {0x2206, 0xE48B}, {0x2206, 0x8E02}, {0x2206, 0x2877}, {0x2206, 0x0225}, - {0x2206, 0xC702}, {0x2206, 0x26A1}, {0x2206, 0x0281}, {0x2206, 0xB302}, - {0x2206, 0x8496}, {0x2206, 0x0202}, {0x2206, 0xA102}, {0x2206, 0x27F1}, - {0x2206, 0x0228}, {0x2206, 0xF902}, {0x2206, 0x2AA0}, {0x2206, 0x0282}, - {0x2206, 0xB8E0}, {0x2206, 0x8B8E}, {0x2206, 0xAD21}, {0x2206, 0x08F6}, - {0x2206, 0x21E4}, {0x2206, 0x8B8E}, {0x2206, 0x0202}, {0x2206, 0x80E0}, - {0x2206, 0x8B8E}, {0x2206, 0xAD22}, {0x2206, 0x05F6}, {0x2206, 0x22E4}, - {0x2206, 0x8B8E}, {0x2206, 0xE08B}, {0x2206, 0x8EAD}, {0x2206, 0x2305}, - {0x2206, 0xF623}, {0x2206, 0xE48B}, {0x2206, 0x8EE0}, {0x2206, 0x8B8E}, - {0x2206, 0xAD24}, {0x2206, 0x08F6}, {0x2206, 0x24E4}, {0x2206, 0x8B8E}, - {0x2206, 0x0227}, {0x2206, 0x6AE0}, {0x2206, 0x8B8E}, {0x2206, 0xAD25}, - {0x2206, 0x05F6}, {0x2206, 0x25E4}, {0x2206, 0x8B8E}, {0x2206, 0xE08B}, - {0x2206, 0x8EAD}, {0x2206, 0x260B}, {0x2206, 0xF626}, {0x2206, 0xE48B}, - {0x2206, 0x8E02}, {0x2206, 0x830D}, {0x2206, 0x021D}, {0x2206, 0x6BE0}, - {0x2206, 0x8B8E}, {0x2206, 0xAD27}, {0x2206, 0x05F6}, {0x2206, 0x27E4}, - {0x2206, 0x8B8E}, {0x2206, 0x0281}, {0x2206, 0x4402}, {0x2206, 0x045C}, - {0x2206, 0xFC04}, {0x2206, 0xF8E0}, {0x2206, 0x8B83}, {0x2206, 0xAD23}, - {0x2206, 0x30E0}, {0x2206, 0xE022}, {0x2206, 0xE1E0}, {0x2206, 0x2359}, - {0x2206, 0x02E0}, {0x2206, 0x85EF}, {0x2206, 0xE585}, {0x2206, 0xEFAC}, - {0x2206, 0x2907}, {0x2206, 0x1F01}, {0x2206, 0x9E51}, {0x2206, 0xAD29}, - {0x2206, 0x20E0}, {0x2206, 0x8B83}, {0x2206, 0xAD21}, {0x2206, 0x06E1}, - {0x2206, 0x8B84}, {0x2206, 0xAD28}, {0x2206, 0x42E0}, {0x2206, 0x8B85}, - {0x2206, 0xAD21}, {0x2206, 0x06E1}, {0x2206, 0x8B84}, {0x2206, 0xAD29}, - {0x2206, 0x36BF}, {0x2206, 0x34BF}, {0x2206, 0x022C}, {0x2206, 0x31AE}, - {0x2206, 0x2EE0}, {0x2206, 0x8B83}, {0x2206, 0xAD21}, {0x2206, 0x10E0}, - {0x2206, 0x8B84}, {0x2206, 0xF620}, {0x2206, 0xE48B}, {0x2206, 0x84EE}, - {0x2206, 0x8ADA}, {0x2206, 0x00EE}, {0x2206, 0x8ADB}, {0x2206, 0x00E0}, - {0x2206, 0x8B85}, {0x2206, 0xAD21}, {0x2206, 0x0CE0}, {0x2206, 0x8B84}, - {0x2206, 0xF621}, {0x2206, 0xE48B}, {0x2206, 0x84EE}, {0x2206, 0x8B72}, - {0x2206, 0xFFBF}, {0x2206, 0x34C2}, {0x2206, 0x022C}, {0x2206, 0x31FC}, - {0x2206, 0x04F8}, {0x2206, 0xFAEF}, {0x2206, 0x69E0}, {0x2206, 0x8B85}, - {0x2206, 0xAD21}, {0x2206, 0x42E0}, {0x2206, 0xE022}, {0x2206, 0xE1E0}, - {0x2206, 0x2358}, {0x2206, 0xC059}, {0x2206, 0x021E}, {0x2206, 0x01E1}, - {0x2206, 0x8B72}, {0x2206, 0x1F10}, {0x2206, 0x9E2F}, {0x2206, 0xE48B}, - {0x2206, 0x72AD}, {0x2206, 0x2123}, {0x2206, 0xE18B}, {0x2206, 0x84F7}, - {0x2206, 0x29E5}, {0x2206, 0x8B84}, {0x2206, 0xAC27}, {0x2206, 0x10AC}, - {0x2206, 0x2605}, {0x2206, 0x0205}, {0x2206, 0x23AE}, {0x2206, 0x1602}, - {0x2206, 0x0535}, {0x2206, 0x0282}, {0x2206, 0x30AE}, {0x2206, 0x0E02}, - {0x2206, 0x056A}, {0x2206, 0x0282}, {0x2206, 0x75AE}, {0x2206, 0x0602}, - {0x2206, 0x04DC}, {0x2206, 0x0282}, {0x2206, 0x04EF}, {0x2206, 0x96FE}, - {0x2206, 0xFC04}, {0x2206, 0xF8F9}, {0x2206, 0xE08B}, {0x2206, 0x87AD}, - {0x2206, 0x2321}, {0x2206, 0xE0EA}, {0x2206, 0x14E1}, {0x2206, 0xEA15}, - {0x2206, 0xAD26}, {0x2206, 0x18F6}, {0x2206, 0x27E4}, {0x2206, 0xEA14}, - {0x2206, 0xE5EA}, {0x2206, 0x15F6}, {0x2206, 0x26E4}, {0x2206, 0xEA14}, - {0x2206, 0xE5EA}, {0x2206, 0x15F7}, {0x2206, 0x27E4}, {0x2206, 0xEA14}, - {0x2206, 0xE5EA}, {0x2206, 0x15FD}, {0x2206, 0xFC04}, {0x2206, 0xF8F9}, - {0x2206, 0xE08B}, {0x2206, 0x87AD}, {0x2206, 0x233A}, {0x2206, 0xAD22}, - {0x2206, 0x37E0}, {0x2206, 0xE020}, {0x2206, 0xE1E0}, {0x2206, 0x21AC}, - {0x2206, 0x212E}, {0x2206, 0xE0EA}, {0x2206, 0x14E1}, {0x2206, 0xEA15}, - {0x2206, 0xF627}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15}, - {0x2206, 0xE2EA}, {0x2206, 0x12E3}, {0x2206, 0xEA13}, {0x2206, 0x5A8F}, - {0x2206, 0x6A20}, {0x2206, 0xE6EA}, {0x2206, 0x12E7}, {0x2206, 0xEA13}, - {0x2206, 0xF726}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15}, - {0x2206, 0xF727}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15}, - {0x2206, 0xFDFC}, {0x2206, 0x04F8}, {0x2206, 0xF9E0}, {0x2206, 0x8B87}, - {0x2206, 0xAD23}, {0x2206, 0x38AD}, {0x2206, 0x2135}, {0x2206, 0xE0E0}, - {0x2206, 0x20E1}, {0x2206, 0xE021}, {0x2206, 0xAC21}, {0x2206, 0x2CE0}, - {0x2206, 0xEA14}, {0x2206, 0xE1EA}, {0x2206, 0x15F6}, {0x2206, 0x27E4}, - {0x2206, 0xEA14}, {0x2206, 0xE5EA}, {0x2206, 0x15E2}, {0x2206, 0xEA12}, - {0x2206, 0xE3EA}, {0x2206, 0x135A}, {0x2206, 0x8FE6}, {0x2206, 0xEA12}, - {0x2206, 0xE7EA}, {0x2206, 0x13F7}, {0x2206, 0x26E4}, {0x2206, 0xEA14}, - {0x2206, 0xE5EA}, {0x2206, 0x15F7}, {0x2206, 0x27E4}, {0x2206, 0xEA14}, - {0x2206, 0xE5EA}, {0x2206, 0x15FD}, {0x2206, 0xFC04}, {0x2206, 0xF8FA}, - {0x2206, 0xEF69}, {0x2206, 0xE08B}, {0x2206, 0x86AD}, {0x2206, 0x2146}, - {0x2206, 0xE0E0}, {0x2206, 0x22E1}, {0x2206, 0xE023}, {0x2206, 0x58C0}, - {0x2206, 0x5902}, {0x2206, 0x1E01}, {0x2206, 0xE18B}, {0x2206, 0x651F}, - {0x2206, 0x109E}, {0x2206, 0x33E4}, {0x2206, 0x8B65}, {0x2206, 0xAD21}, - {0x2206, 0x22AD}, {0x2206, 0x272A}, {0x2206, 0xD400}, {0x2206, 0x01BF}, - {0x2206, 0x34F2}, {0x2206, 0x022C}, {0x2206, 0xA2BF}, {0x2206, 0x34F5}, - {0x2206, 0x022C}, {0x2206, 0xE0E0}, {0x2206, 0x8B67}, {0x2206, 0x1B10}, - {0x2206, 0xAA14}, {0x2206, 0xE18B}, {0x2206, 0x660D}, {0x2206, 0x1459}, - {0x2206, 0x0FAE}, {0x2206, 0x05E1}, {0x2206, 0x8B66}, {0x2206, 0x590F}, - {0x2206, 0xBF85}, {0x2206, 0x6102}, {0x2206, 0x2CA2}, {0x2206, 0xEF96}, - {0x2206, 0xFEFC}, {0x2206, 0x04F8}, {0x2206, 0xF9FA}, {0x2206, 0xFBEF}, - {0x2206, 0x79E2}, {0x2206, 0x8AD2}, {0x2206, 0xAC19}, {0x2206, 0x2DE0}, - {0x2206, 0xE036}, {0x2206, 0xE1E0}, {0x2206, 0x37EF}, {0x2206, 0x311F}, - {0x2206, 0x325B}, {0x2206, 0x019E}, {0x2206, 0x1F7A}, {0x2206, 0x0159}, - {0x2206, 0x019F}, {0x2206, 0x0ABF}, {0x2206, 0x348E}, {0x2206, 0x022C}, - {0x2206, 0x31F6}, {0x2206, 0x06AE}, {0x2206, 0x0FF6}, {0x2206, 0x0302}, - {0x2206, 0x0470}, {0x2206, 0xF703}, {0x2206, 0xF706}, {0x2206, 0xBF34}, - {0x2206, 0x9302}, {0x2206, 0x2C31}, {0x2206, 0xAC1A}, {0x2206, 0x25E0}, - {0x2206, 0xE022}, {0x2206, 0xE1E0}, {0x2206, 0x23EF}, {0x2206, 0x300D}, - {0x2206, 0x311F}, {0x2206, 0x325B}, {0x2206, 0x029E}, {0x2206, 0x157A}, - {0x2206, 0x0258}, {0x2206, 0xC4A0}, {0x2206, 0x0408}, {0x2206, 0xBF34}, - {0x2206, 0x9E02}, {0x2206, 0x2C31}, {0x2206, 0xAE06}, {0x2206, 0xBF34}, - {0x2206, 0x9C02}, {0x2206, 0x2C31}, {0x2206, 0xAC1B}, {0x2206, 0x4AE0}, - {0x2206, 0xE012}, {0x2206, 0xE1E0}, {0x2206, 0x13EF}, {0x2206, 0x300D}, - {0x2206, 0x331F}, {0x2206, 0x325B}, {0x2206, 0x1C9E}, {0x2206, 0x3AEF}, - {0x2206, 0x325B}, {0x2206, 0x1C9F}, {0x2206, 0x09BF}, {0x2206, 0x3498}, - {0x2206, 0x022C}, {0x2206, 0x3102}, {0x2206, 0x83C5}, {0x2206, 0x5A03}, - {0x2206, 0x0D03}, {0x2206, 0x581C}, {0x2206, 0x1E20}, {0x2206, 0x0207}, - {0x2206, 0xA0A0}, {0x2206, 0x000E}, {0x2206, 0x0284}, {0x2206, 0x17AD}, - {0x2206, 0x1817}, {0x2206, 0xBF34}, {0x2206, 0x9A02}, {0x2206, 0x2C31}, - {0x2206, 0xAE0F}, {0x2206, 0xBF34}, {0x2206, 0xC802}, {0x2206, 0x2C31}, - {0x2206, 0xBF34}, {0x2206, 0xC502}, {0x2206, 0x2C31}, {0x2206, 0x0284}, - {0x2206, 0x52E6}, {0x2206, 0x8AD2}, {0x2206, 0xEF97}, {0x2206, 0xFFFE}, - {0x2206, 0xFDFC}, {0x2206, 0x04F8}, {0x2206, 0xBF34}, {0x2206, 0xDA02}, - {0x2206, 0x2CE0}, {0x2206, 0xE58A}, {0x2206, 0xD3BF}, {0x2206, 0x34D4}, - {0x2206, 0x022C}, {0x2206, 0xE00C}, {0x2206, 0x1159}, {0x2206, 0x02E0}, - {0x2206, 0x8AD3}, {0x2206, 0x1E01}, {0x2206, 0xE48A}, {0x2206, 0xD3D1}, - {0x2206, 0x00BF}, {0x2206, 0x34DA}, {0x2206, 0x022C}, {0x2206, 0xA2D1}, - {0x2206, 0x01BF}, {0x2206, 0x34D4}, {0x2206, 0x022C}, {0x2206, 0xA2BF}, - {0x2206, 0x34CB}, {0x2206, 0x022C}, {0x2206, 0xE0E5}, {0x2206, 0x8ACE}, - {0x2206, 0xBF85}, {0x2206, 0x6702}, {0x2206, 0x2CE0}, {0x2206, 0xE58A}, - {0x2206, 0xCFBF}, {0x2206, 0x8564}, {0x2206, 0x022C}, {0x2206, 0xE0E5}, - {0x2206, 0x8AD0}, {0x2206, 0xBF85}, {0x2206, 0x6A02}, {0x2206, 0x2CE0}, - {0x2206, 0xE58A}, {0x2206, 0xD1FC}, {0x2206, 0x04F8}, {0x2206, 0xE18A}, - {0x2206, 0xD1BF}, {0x2206, 0x856A}, {0x2206, 0x022C}, {0x2206, 0xA2E1}, - {0x2206, 0x8AD0}, {0x2206, 0xBF85}, {0x2206, 0x6402}, {0x2206, 0x2CA2}, - {0x2206, 0xE18A}, {0x2206, 0xCFBF}, {0x2206, 0x8567}, {0x2206, 0x022C}, - {0x2206, 0xA2E1}, {0x2206, 0x8ACE}, {0x2206, 0xBF34}, {0x2206, 0xCB02}, - {0x2206, 0x2CA2}, {0x2206, 0xE18A}, {0x2206, 0xD3BF}, {0x2206, 0x34DA}, - {0x2206, 0x022C}, {0x2206, 0xA2E1}, {0x2206, 0x8AD3}, {0x2206, 0x0D11}, - {0x2206, 0xBF34}, {0x2206, 0xD402}, {0x2206, 0x2CA2}, {0x2206, 0xFC04}, - {0x2206, 0xF9A0}, {0x2206, 0x0405}, {0x2206, 0xE38A}, {0x2206, 0xD4AE}, - {0x2206, 0x13A0}, {0x2206, 0x0805}, {0x2206, 0xE38A}, {0x2206, 0xD5AE}, - {0x2206, 0x0BA0}, {0x2206, 0x0C05}, {0x2206, 0xE38A}, {0x2206, 0xD6AE}, - {0x2206, 0x03E3}, {0x2206, 0x8AD7}, {0x2206, 0xEF13}, {0x2206, 0xBF34}, - {0x2206, 0xCB02}, {0x2206, 0x2CA2}, {0x2206, 0xEF13}, {0x2206, 0x0D11}, - {0x2206, 0xBF85}, {0x2206, 0x6702}, {0x2206, 0x2CA2}, {0x2206, 0xEF13}, - {0x2206, 0x0D14}, {0x2206, 0xBF85}, {0x2206, 0x6402}, {0x2206, 0x2CA2}, - {0x2206, 0xEF13}, {0x2206, 0x0D17}, {0x2206, 0xBF85}, {0x2206, 0x6A02}, - {0x2206, 0x2CA2}, {0x2206, 0xFD04}, {0x2206, 0xF8E0}, {0x2206, 0x8B85}, - {0x2206, 0xAD27}, {0x2206, 0x2DE0}, {0x2206, 0xE036}, {0x2206, 0xE1E0}, - {0x2206, 0x37E1}, {0x2206, 0x8B73}, {0x2206, 0x1F10}, {0x2206, 0x9E20}, - {0x2206, 0xE48B}, {0x2206, 0x73AC}, {0x2206, 0x200B}, {0x2206, 0xAC21}, - {0x2206, 0x0DAC}, {0x2206, 0x250F}, {0x2206, 0xAC27}, {0x2206, 0x0EAE}, - {0x2206, 0x0F02}, {0x2206, 0x84CC}, {0x2206, 0xAE0A}, {0x2206, 0x0284}, - {0x2206, 0xD1AE}, {0x2206, 0x05AE}, {0x2206, 0x0302}, {0x2206, 0x84D8}, - {0x2206, 0xFC04}, {0x2206, 0xEE8B}, {0x2206, 0x6800}, {0x2206, 0x0402}, - {0x2206, 0x84E5}, {0x2206, 0x0285}, {0x2206, 0x2804}, {0x2206, 0x0285}, - {0x2206, 0x4904}, {0x2206, 0xEE8B}, {0x2206, 0x6800}, {0x2206, 0xEE8B}, - {0x2206, 0x6902}, {0x2206, 0x04F8}, {0x2206, 0xF9E0}, {0x2206, 0x8B85}, - {0x2206, 0xAD26}, {0x2206, 0x38D0}, {0x2206, 0x0B02}, {0x2206, 0x2B4D}, - {0x2206, 0x5882}, {0x2206, 0x7882}, {0x2206, 0x9F2D}, {0x2206, 0xE08B}, - {0x2206, 0x68E1}, {0x2206, 0x8B69}, {0x2206, 0x1F10}, {0x2206, 0x9EC8}, - {0x2206, 0x10E4}, {0x2206, 0x8B68}, {0x2206, 0xE0E0}, {0x2206, 0x00E1}, - {0x2206, 0xE001}, {0x2206, 0xF727}, {0x2206, 0xE4E0}, {0x2206, 0x00E5}, - {0x2206, 0xE001}, {0x2206, 0xE2E0}, {0x2206, 0x20E3}, {0x2206, 0xE021}, - {0x2206, 0xAD30}, {0x2206, 0xF7F6}, {0x2206, 0x27E4}, {0x2206, 0xE000}, - {0x2206, 0xE5E0}, {0x2206, 0x01FD}, {0x2206, 0xFC04}, {0x2206, 0xF8FA}, - {0x2206, 0xEF69}, {0x2206, 0xE08B}, {0x2206, 0x86AD}, {0x2206, 0x2212}, - {0x2206, 0xE0E0}, {0x2206, 0x14E1}, {0x2206, 0xE015}, {0x2206, 0xAD26}, - {0x2206, 0x9CE1}, {0x2206, 0x85E0}, {0x2206, 0xBF85}, {0x2206, 0x6D02}, - {0x2206, 0x2CA2}, {0x2206, 0xEF96}, {0x2206, 0xFEFC}, {0x2206, 0x04F8}, - {0x2206, 0xFAEF}, {0x2206, 0x69E0}, {0x2206, 0x8B86}, {0x2206, 0xAD22}, - {0x2206, 0x09E1}, {0x2206, 0x85E1}, {0x2206, 0xBF85}, {0x2206, 0x6D02}, - {0x2206, 0x2CA2}, {0x2206, 0xEF96}, {0x2206, 0xFEFC}, {0x2206, 0x0464}, - {0x2206, 0xE48C}, {0x2206, 0xFDE4}, {0x2206, 0x80CA}, {0x2206, 0xE480}, - {0x2206, 0x66E0}, {0x2206, 0x8E70}, {0x2206, 0xE076}, {0x2205, 0xE142}, - {0x2206, 0x0701}, {0x2205, 0xE140}, {0x2206, 0x0405}, {0x220F, 0x0000}, - {0x221F, 0x0000}, {0x2200, 0x1340}, {0x133E, 0x000E}, {0x133F, 0x0010}, - {0x13EB, 0x11BB} + {0x2206, 0x6602}, {0x2206, 0x8044}, {0x2206, 0x0201}, {0x2206, 0x7CE0}, + {0x2206, 0x8B8C}, {0x2206, 0xE18B}, {0x2206, 0x8D1E}, {0x2206, 0x01E1}, + {0x2206, 0x8B8E}, {0x2206, 0x1E01}, {0x2206, 0xA000}, {0x2206, 0xE4AE}, + {0x2206, 0xD8EE}, {0x2206, 0x85C0}, {0x2206, 0x00EE}, {0x2206, 0x85C1}, + {0x2206, 0x00EE}, {0x2206, 0x8AFC}, {0x2206, 0x07EE}, {0x2206, 0x8AFD}, + {0x2206, 0x73EE}, {0x2206, 0xFFF6}, {0x2206, 0x00EE}, {0x2206, 0xFFF7}, + {0x2206, 0xFC04}, {0x2206, 0xF8E0}, {0x2206, 0x8B8E}, {0x2206, 0xAD20}, + {0x2206, 0x0302}, {0x2206, 0x8050}, {0x2206, 0xFC04}, {0x2206, 0xF8F9}, + {0x2206, 0xE08B}, {0x2206, 0x85AD}, {0x2206, 0x2548}, {0x2206, 0xE08A}, + {0x2206, 0xE4E1}, {0x2206, 0x8AE5}, {0x2206, 0x7C00}, {0x2206, 0x009E}, + {0x2206, 0x35EE}, {0x2206, 0x8AE4}, {0x2206, 0x00EE}, {0x2206, 0x8AE5}, + {0x2206, 0x00E0}, {0x2206, 0x8AFC}, {0x2206, 0xE18A}, {0x2206, 0xFDE2}, + {0x2206, 0x85C0}, {0x2206, 0xE385}, {0x2206, 0xC102}, {0x2206, 0x2DAC}, + {0x2206, 0xAD20}, {0x2206, 0x12EE}, {0x2206, 0x8AE4}, {0x2206, 0x03EE}, + {0x2206, 0x8AE5}, {0x2206, 0xB7EE}, {0x2206, 0x85C0}, {0x2206, 0x00EE}, + {0x2206, 0x85C1}, {0x2206, 0x00AE}, {0x2206, 0x1115}, {0x2206, 0xE685}, + {0x2206, 0xC0E7}, {0x2206, 0x85C1}, {0x2206, 0xAE08}, {0x2206, 0xEE85}, + {0x2206, 0xC000}, {0x2206, 0xEE85}, {0x2206, 0xC100}, {0x2206, 0xFDFC}, + {0x2206, 0x0400}, {0x2205, 0xE142}, {0x2206, 0x0701}, {0x2205, 0xE140}, + {0x2206, 0x0405}, {0x220F, 0x0000}, {0x221F, 0x0000}, {0x133E, 0x000E}, + {0x133F, 0x0010}, {0x13E0, 0x0010}, {0x207F, 0x0002}, {0x2073, 0x1D22}, + {0x207F, 0x0000}, {0x133F, 0x0030}, {0x133E, 0x000E}, {0x2200, 0x1340}, + {0x133E, 0x000E}, {0x133F, 0x0010}, {0x1303, 0x0778}, {0x1304, 0x7777}, + {0x13E2, 0x01FE} }; static const struct rtl8367b_initval rtl8367r_vb_initvals_1[] = { From 521962517d35194947eba26004e5bad83c3ed406 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 16 Feb 2017 16:26:59 +0500 Subject: [PATCH 38/49] generic: rtl8367b: update init array names Update names according to chip names. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../linux/generic/files/drivers/net/phy/rtl8367b.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 38e29048ccc0..dabf0854738c 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -315,7 +315,7 @@ rtl8367b_mib_counters[RTL8367B_NUM_MIB_COUNTERS] = { #define REG_WR_PHY(_smi, _addr, _reg, _val) \ REG_WR(_smi, RTL8367B_INTERNAL_PHY_REG(_addr, _reg), _val); -static const struct rtl8367b_initval rtl8367r_vb_initvals_0[] = { +static const struct rtl8367b_initval rtl8367rb_initvals[] = { {0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x1305, 0xC000}, {0x121E, 0x03CA}, {0x1233, 0x0352}, {0x1234, 0x0064}, {0x1237, 0x0096}, {0x1238, 0x0078}, {0x1239, 0x0084}, {0x123A, 0x0030}, {0x205F, 0x0002}, {0x2059, 0x1A00}, @@ -357,7 +357,7 @@ static const struct rtl8367b_initval rtl8367r_vb_initvals_0[] = { {0x13E2, 0x01FE} }; -static const struct rtl8367b_initval rtl8367r_vb_initvals_1[] = { +static const struct rtl8367b_initval rtl8367r_vb_initvals[] = { {0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x1305, 0xC000}, {0x121E, 0x03CA}, {0x1233, 0x0352}, {0x1234, 0x0064}, {0x1237, 0x0096}, {0x1238, 0x0078}, {0x1239, 0x0084}, {0x123A, 0x0030}, {0x205F, 0x0002}, {0x2059, 0x1A00}, @@ -550,13 +550,13 @@ static int rtl8367b_init_regs(struct rtl8366_smi *smi) switch (smi->chip_ver) { case 0x1000: - initvals = rtl8367r_vb_initvals_0; - count = ARRAY_SIZE(rtl8367r_vb_initvals_0); + initvals = rtl8367rb_initvals; + count = ARRAY_SIZE(rtl8367rb_initvals); break; case 0x1010: - initvals = rtl8367r_vb_initvals_1; - count = ARRAY_SIZE(rtl8367r_vb_initvals_1); + initvals = rtl8367r_vb_initvals; + count = ARRAY_SIZE(rtl8367r_vb_initvals); break; default: From 7c4fc6315ed8be42562f3bc920de337d9d18e877 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 11:33:58 +0500 Subject: [PATCH 39/49] generic: rtl8367b: fix port enable method Previously method marked port as not permitted, perform actual port on/off. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index dabf0854738c..47581088d742 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -1039,10 +1039,25 @@ static int rtl8367b_is_vlan_valid(struct rtl8366_smi *smi, unsigned vlan) static int rtl8367b_enable_port(struct rtl8366_smi *smi, int port, int enable) { int err; + u32 data; + + dev_dbg(smi->parent, "port #%d set %s\n", port + 1, (enable == 1)? "on" : "off"); + /* Port isolation */ REG_WR(smi, RTL8367B_PORT_ISOLATION_REG(port), (enable) ? RTL8367B_PORTS_ALL : 0); + /* Power up/down port */ + err = rtl8367b_port_phy_reg_get(smi, port, 0, &data); + if (err == 0) { + if (enable) + data &= ~(1U << 11); + else + data |= (1U << 11); + + rtl8367b_port_phy_reg_set(smi, port, 0, data); + } + return 0; } From 4e8b612ccf521c6c1212ba9bd90af6aea9775860 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 12:09:40 +0500 Subject: [PATCH 40/49] generic: rtl8367b: add LED mode options Add register and mask definitions for LED operations Add LED control methods: group enable, switch serial/parallel mode, set group mode, get/set blink rate. Add swconfig methods: get/set group mode, get/set blink rate. Add LED initialisation Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 172 ++++++++++++++++++ 1 file changed, 172 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 47581088d742..a14f099a1ccc 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -219,6 +219,22 @@ #define RTL8367B_PDN_PHY_OFFSET 5 #define RTL8367B_PHY_PAGE_ADDRESS 0x1F +#define RTL8367B_REG_LED_MODE 0x1b02 +#define RTL8367B_REG_LED_CONFIGURATION 0x1b03 +#define RTL8367B_REG_LED_SYS_CONFIG 0x1b00 +#define RTL8367B_REG_PARA_LED_IO_EN1 0x1b24 +#define RTL8367B_REG_SCAN0_LED_IO_EN 0x1b26 +#define RTL8367B_LED_CONFIG_SEL_OFFSET 14 +#define RTL8367B_LED_SERI_CLK_EN_OFFSET 0 +#define RTL8367B_LED_SELECT_OFFSET 0 +#define RTL8367B_LED_SERI_DATA_EN_OFFSET 1 +#define RTL8367B_LED0_CFG_MASK 0xF +#define RTL8367B_LED1_CFG_MASK 0xF0 +#define RTL8367B_LED2_CFG_MASK 0xF00 +#define RTL8367B_LEDGROUPNO 3 +#define RTL8367B_LEDGROUPMASK 0x7 +#define RTL8367B_SEL_LEDRATE_MASK 0xE + struct rtl8367b_initval { u16 reg; u16 val; @@ -746,6 +762,86 @@ static int rtl8367b_extif_init_of(struct rtl8366_smi *smi, int id, } #endif +static int rtl8367b_led_group_enable(struct rtl8366_smi *smi, u32 group) +{ + return rtl8366_smi_rmwr(smi, + RTL8367B_REG_PARA_LED_IO_EN1 + group / 2, + 0xFF << ((group % 2) * 8), RTL8367B_PORT_ALL_EXTERNAL); +} + +/* Set serial/parallel led mode */ +static int rtl8367b_led_op_mode(struct rtl8366_smi *smi, u32 mode) +{ + int err; + + /* Invalid input parameter */ + if (mode > 1) + return -EINVAL; + + /* Set parallel mode */ + err = rtl8366_smi_rmwr(smi, RTL8367B_REG_LED_SYS_CONFIG, BIT(RTL8367B_LED_SELECT_OFFSET), mode); + if (err) return err; + + /* Disable serial CLK mode */ + err = rtl8366_smi_rmwr(smi, RTL8367B_REG_SCAN0_LED_IO_EN, BIT(RTL8367B_LED_SERI_CLK_EN_OFFSET), mode); + if (err) return err; + + /* Disable serial DATA mode */ + err = rtl8366_smi_rmwr(smi, + RTL8367B_REG_SCAN0_LED_IO_EN, + BIT(RTL8367B_LED_SERI_DATA_EN_OFFSET), + mode << RTL8367B_LED_SERI_DATA_EN_OFFSET); + if (err) return err; + + return 0; +} + +static int rtl8367b_led_group_set_mode(struct rtl8366_smi *smi, + u32 group, u32 mode) +{ + int err; + + if(group > 2) + return -EINVAL; + + if(mode > 15) + return -EINVAL; + + /* Switch off bit */ + err = rtl8366_smi_rmwr(smi, + RTL8367B_REG_LED_CONFIGURATION, + BIT(RTL8367B_LED_CONFIG_SEL_OFFSET), 0); + if (err) return err; + + return rtl8366_smi_rmwr(smi, RTL8367B_REG_LED_CONFIGURATION, + 0xF << (4 * group), + mode << (4 * group)); +} + +static int rtl8367b_set_led_blinkrate(struct rtl8366_smi *smi, u32 blinkRate) +{ + int err; + + if (blinkRate > 7) + return -EINVAL; + + REG_RMW(smi, RTL8367B_REG_LED_MODE, RTL8367B_SEL_LEDRATE_MASK, blinkRate); + + return 0; +} + +static int rtl8367b_get_led_blinkrate(struct rtl8366_smi *smi, u32 *blinkRate) +{ + int err; + + err = rtl8366_smi_read_reg(smi, RTL8367B_REG_LED_MODE, blinkRate); + if (err) return err; + + *blinkRate = *blinkRate & RTL8367B_SEL_LEDRATE_MASK; + + return 0; +} + static int rtl8367b_setup(struct rtl8366_smi *smi) { struct rtl8367_platform_data *pdata; @@ -801,6 +897,17 @@ static int rtl8367b_setup(struct rtl8366_smi *smi) RTL8367B_PORT_MISC_CFG_EGRESS_MODE_ORIGINAL << RTL8367B_PORT_MISC_CFG_EGRESS_MODE_SHIFT); + /* setup LEDs */ + err = rtl8367b_led_group_enable(smi, 0); + if (err) return err; + + /* Set led to parallel mode */ + err = rtl8367b_led_op_mode(smi, 0); + if (err) return err; + + err = rtl8367b_led_group_set_mode(smi, 0, 2); + if (err) return err; + return 0; } @@ -1154,6 +1261,57 @@ static int rtl8367b_sw_set_max_length(struct switch_dev *dev, RTL8367B_SWC0_MAX_LENGTH_MASK, max_len); } +static int rtl8367b_sw_get_led_blink(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + u32 data; + + if (rtl8367b_get_led_blinkrate(smi, &data)) + return -EIO; + + val->value.i = data; + + return 0; +} + +static int rtl8367b_sw_set_led_blink(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + if (val->value.i > 15) + return -EINVAL; + + return rtl8367b_set_led_blinkrate(smi, val->value.i); +} + +static int rtl8367b_sw_get_led(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + u32 data; + + rtl8366_smi_read_reg(smi, RTL8367B_REG_LED_CONFIGURATION, &data); + val->value.i = data & 0xF; + + return 0; +} + +static int rtl8367b_sw_set_led(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + if (val->value.i > 15) + return -EINVAL; + + return rtl8367b_led_group_set_mode(smi, 0, val->value.i); +} static int rtl8367b_sw_reset_port_mibs(struct switch_dev *dev, const struct switch_attr *attr, @@ -1200,6 +1358,20 @@ static struct switch_attr rtl8367b_globals[] = { .set = rtl8367b_sw_set_max_length, .get = rtl8367b_sw_get_max_length, .max = 3, + }, { + .type = SWITCH_TYPE_INT, + .name = "led", + .description = "Set LED mode led (0 - disable)", + .get = rtl8367b_sw_get_led, + .set = rtl8367b_sw_set_led, + .max = 15, + }, { + .type = SWITCH_TYPE_INT, + .name = "blink", + .description = "Set LED blink rate (0:43ms, 1:84ms, 2:120ms, 3:170ms, 4:340ms, 5:670ms)", + .get = rtl8367b_sw_get_led_blink, + .set = rtl8367b_sw_set_led_blink, + .max = 7, } }; From 725a883b40714aa2936ab662822874ff9a99bef0 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 12:11:18 +0500 Subject: [PATCH 41/49] generic: rtl8367b: add green mode option MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add swconfig methods to allow automatically manage port power with Realtek’s Green Ethernet power saving modes, and Energy Efficient Ethernet (EEE) mode (defined in IEEE 802.3az), to minimize system power consumption. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 62 ++++++++++++++++++- 1 file changed, 61 insertions(+), 1 deletion(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index a14f099a1ccc..2676436278fb 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -2,6 +2,7 @@ * Platform driver for the Realtek RTL8367R-VB ethernet switches * * Copyright (C) 2012 Gabor Juhos + * Copyright (C) 2017 Vitaly Chekryzhev <13hakta@gmail.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published @@ -235,6 +236,11 @@ #define RTL8367B_LEDGROUPMASK 0x7 #define RTL8367B_SEL_LEDRATE_MASK 0xE +#define RTL8367B_PHY_POWERSAVING_REG 21 +#define RTL8367B_PHY_POWERSAVING_OFFSET 12 +#define RTL8367B_PHY_POWERSAVING_MASK 0x1000 +#define RTL8367B_PHY_GREEN_OFFSET 6 + struct rtl8367b_initval { u16 reg; u16 val; @@ -1313,6 +1319,53 @@ static int rtl8367b_sw_set_led(struct switch_dev *dev, return rtl8367b_led_group_set_mode(smi, 0, val->value.i); } +static int rtl8367b_sw_get_green(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + u32 data; + int err; + + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + /* Read green flag */ + REG_RD(smi, RTL8367B_REG_PHY_AD, &data); + + val->value.i = ((data & BIT(RTL8367B_PHY_GREEN_OFFSET)) >> RTL8367B_PHY_GREEN_OFFSET == 1)? 1 : 0; + + return 0; +} + +static int rtl8367b_sw_set_green(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + int i, err; + u32 data; + + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + if (val->value.i > 1) + return -EINVAL; + + REG_RMW(smi, + RTL8367B_REG_PHY_AD, + BIT(RTL8367B_PHY_GREEN_OFFSET), + val->value.i << RTL8367B_PHY_GREEN_OFFSET); + + /* Set green mode for all PHY ports */ + for (i = 0; i < RTL8367B_PHY_MAX; i++) { + rtl8367b_port_phy_reg_get(smi, i, RTL8367B_PHY_POWERSAVING_REG, &data); + + data = (data & (~RTL8367B_PHY_POWERSAVING_MASK)) | (val->value.i << + RTL8367B_PHY_POWERSAVING_OFFSET); + + rtl8367b_port_phy_reg_set(smi, i, RTL8367B_PHY_POWERSAVING_REG, data); + } + + return 0; +} + static int rtl8367b_sw_reset_port_mibs(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) @@ -1372,7 +1425,14 @@ static struct switch_attr rtl8367b_globals[] = { .get = rtl8367b_sw_get_led_blink, .set = rtl8367b_sw_set_led_blink, .max = 7, - } + }, { + .type = SWITCH_TYPE_INT, + .name = "green", + .description = "Set green mode (0 - disable)", + .get = rtl8367b_sw_get_green, + .set = rtl8367b_sw_set_green, + .max = 1, + }, }; static struct switch_attr rtl8367b_port[] = { From b2d87719a2cd8b98f05771d94185baed0339e622 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 11:39:37 +0500 Subject: [PATCH 42/49] generic: rtl8367b: add ability to disable port at runtime Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8367b.c | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c index 2676436278fb..ba903215ece9 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c @@ -1381,6 +1381,37 @@ static int rtl8367b_sw_reset_port_mibs(struct switch_dev *dev, RTL8367B_MIB_CTRL0_PORT_RESET_MASK(port % 8)); } +static int rtl8367b_sw_set_port_disable(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + if (val->port_vlan > RTL8367B_PHY_MAX) + return -EINVAL; + + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + return rtl8367b_enable_port(smi, val->port_vlan, 1 - val->value.i); +} + +static int rtl8367b_sw_get_port_disable(struct switch_dev *dev, + const struct switch_attr *attr, + struct switch_val *val) +{ + int err; + u32 data; + + struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev); + + if (val->port_vlan > RTL8367B_PHY_MAX) + return -EINVAL; + + err = rtl8367b_port_phy_reg_get(smi, val->port_vlan, 0, &data); + + val->value.i = ((data & (1 << 11)) >> 11); + + return 0; +} + static struct switch_attr rtl8367b_globals[] = { { .type = SWITCH_TYPE_INT, @@ -1448,6 +1479,13 @@ static struct switch_attr rtl8367b_port[] = { .max = 33, .set = NULL, .get = rtl8366_sw_get_port_mib, + }, { + .type = SWITCH_TYPE_INT, + .name = "disable", + .description = "Get/Set port state (enabled or disabled)", + .max = 1, + .set = rtl8367b_sw_set_port_disable, + .get = rtl8367b_sw_get_port_disable, }, }; From b6942bcc3b1b8893ae2ecbf0755dbb04caf7dec7 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Sat, 17 Dec 2016 15:13:06 +0100 Subject: [PATCH 43/49] generic: rtl8366_smi: fix code format Fix indentation, add missing linebreaks and remove superfluous linebreaks. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../generic/files/drivers/net/phy/rtl8366_smi.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c index b8cdf30de48c..464e4d254259 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c @@ -608,8 +608,8 @@ int rtl8366_debugfs_open(struct inode *inode, struct file *file) EXPORT_SYMBOL_GPL(rtl8366_debugfs_open); static ssize_t rtl8366_read_debugfs_vlan_mc(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) + char __user *user_buf, + size_t count, loff_t *ppos) { struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data; int i, len = 0; @@ -699,8 +699,8 @@ static ssize_t rtl8366_read_debugfs_pvid(struct file *file, } static ssize_t rtl8366_read_debugfs_reg(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) + char __user *user_buf, + size_t count, loff_t *ppos) { struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data; u32 t, reg = smi->dbg_reg; @@ -723,8 +723,8 @@ static ssize_t rtl8366_read_debugfs_reg(struct file *file, } static ssize_t rtl8366_write_debugfs_reg(struct file *file, - const char __user *user_buf, - size_t count, loff_t *ppos) + const char __user *user_buf, + size_t count, loff_t *ppos) { struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data; unsigned long data; @@ -870,7 +870,7 @@ static void rtl8366_debugfs_init(struct rtl8366_smi *smi) } node = debugfs_create_u8("vlan_4k_page", S_IRUGO | S_IWUSR, root, - &smi->dbg_vlan_4k_page); + &smi->dbg_vlan_4k_page); if (!node) { dev_err(smi->parent, "Creating debugfs file '%s' failed\n", "vlan_4k_page"); @@ -1423,7 +1423,6 @@ int rtl8366_smi_probe_plat(struct platform_device *pdev, struct rtl8366_smi *smi return 0; } - struct rtl8366_smi *rtl8366_smi_probe(struct platform_device *pdev) { struct rtl8366_smi *smi; From de5236b577547d27f2bfc3613a72a86c722cc779 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 13:00:19 +0500 Subject: [PATCH 44/49] generic: rtl8366_smi: move definitions to header Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8366_smi.c | 5 ----- target/linux/generic/files/drivers/net/phy/rtl8366_smi.h | 5 +++++ 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c index 464e4d254259..57862e7d702d 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c @@ -27,11 +27,6 @@ #include "rtl8366_smi.h" -#define RTL8366_SMI_ACK_RETRY_COUNT 5 - -#define RTL8366_SMI_HW_STOP_DELAY 25 /* msecs */ -#define RTL8366_SMI_HW_START_DELAY 100 /* msecs */ - static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi) { ndelay(smi->clk_delay); diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h index 1100b3d21edf..018656640811 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h @@ -15,6 +15,11 @@ #include #include +#define RTL8366_SMI_ACK_RETRY_COUNT 5 + +#define RTL8366_SMI_HW_STOP_DELAY 25 /* msecs */ +#define RTL8366_SMI_HW_START_DELAY 100 /* msecs */ + struct rtl8366_smi_ops; struct rtl8366_vlan_ops; struct mii_bus; From e12790fb248d1ccc0ffdaf4735d091355ca18cae Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 13:02:13 +0500 Subject: [PATCH 45/49] generic: rtl8366_smi: move delay method to header and convert it to macro Convert method to macro slightly improves performance. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8366_smi.c | 5 ----- target/linux/generic/files/drivers/net/phy/rtl8366_smi.h | 2 ++ 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c index 57862e7d702d..96d6177c00fc 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c @@ -27,11 +27,6 @@ #include "rtl8366_smi.h" -static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi) -{ - ndelay(smi->clk_delay); -} - static void rtl8366_smi_start(struct rtl8366_smi *smi) { unsigned int sda = smi->gpio_sda; diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h index 018656640811..aede808b56b4 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h @@ -20,6 +20,8 @@ #define RTL8366_SMI_HW_STOP_DELAY 25 /* msecs */ #define RTL8366_SMI_HW_START_DELAY 100 /* msecs */ +#define rtl8366_smi_clk_delay(smi) ndelay(smi->clk_delay) + struct rtl8366_smi_ops; struct rtl8366_vlan_ops; struct mii_bus; From bb4687ac83c325832e127baf4738032bc7875909 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 13:06:58 +0500 Subject: [PATCH 46/49] generic: rtl8366_smi: add direct MDIO support Switches support two management modes: GPIO driven/MDIO, while MDIO support was missing. Workaround methods to add direct MDIO support. Extend 'rtl8366_smi' struct with mdio_enabled flag. Flag is set if 'mdio' property was found in devicetree, otherwise switch is controlled via GPIO. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- .../files/drivers/net/phy/rtl8366_smi.c | 266 ++++++++++++------ .../files/drivers/net/phy/rtl8366_smi.h | 14 + 2 files changed, 201 insertions(+), 79 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c index 96d6177c00fc..e19f43898954 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c @@ -2,6 +2,7 @@ * Realtek RTL8366 SMI interface driver * * Copyright (C) 2009-2010 Gabor Juhos + * Copyright (C) 2017 Vitaly Chekryzhev <13hakta@gmail.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published @@ -18,6 +19,7 @@ #include #include #include +#include #include #include @@ -197,34 +199,71 @@ int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data) spin_lock_irqsave(&smi->lock, flags); - rtl8366_smi_start(smi); + if (smi->mdio_enabled) { + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* send READ command */ - ret = rtl8366_smi_write_byte(smi, smi->cmd_read); - if (ret) - goto out; + /* Write address control code to register 31 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_CTRL0_REG, MDC_MDIO_ADDR_OP); - /* set ADDR[7:0] */ - ret = rtl8366_smi_write_byte(smi, addr & 0xff); - if (ret) - goto out; + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* set ADDR[15:8] */ - ret = rtl8366_smi_write_byte(smi, addr >> 8); - if (ret) - goto out; + /* Write address to register 23 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_ADDRESS_REG, addr); + + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* read DATA[7:0] */ - rtl8366_smi_read_byte0(smi, &lo); - /* read DATA[15:8] */ - rtl8366_smi_read_byte1(smi, &hi); + /* Write read control code to register 21 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_CTRL1_REG, MDC_MDIO_READ_OP); - *data = ((u32) lo) | (((u32) hi) << 8); + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - ret = 0; + /* Read data from register 25 */ + *data = smi->mii_bus->read(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_DATA_READ_REG); + + ret = (*data == 0xffff) ? 1 : 0; + } else { + rtl8366_smi_start(smi); + + /* send READ command */ + ret = rtl8366_smi_write_byte(smi, smi->cmd_read); + if (ret) + goto out; + + /* set ADDR[7:0] */ + ret = rtl8366_smi_write_byte(smi, addr & 0xff); + if (ret) + goto out; + + /* set ADDR[15:8] */ + ret = rtl8366_smi_write_byte(smi, addr >> 8); + if (ret) + goto out; + + /* read DATA[7:0] */ + rtl8366_smi_read_byte0(smi, &lo); + /* read DATA[15:8] */ + rtl8366_smi_read_byte1(smi, &hi); + + *data = ((u32) lo) | (((u32) hi) << 8); + + ret = 0; + +out: + rtl8366_smi_stop(smi); + } - out: - rtl8366_smi_stop(smi); spin_unlock_irqrestore(&smi->lock, flags); return ret; @@ -239,40 +278,77 @@ static int __rtl8366_smi_write_reg(struct rtl8366_smi *smi, spin_lock_irqsave(&smi->lock, flags); - rtl8366_smi_start(smi); + if (smi->mdio_enabled) { + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* send WRITE command */ - ret = rtl8366_smi_write_byte(smi, smi->cmd_write); - if (ret) - goto out; + /* Write address control code to register 31 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_CTRL0_REG, MDC_MDIO_ADDR_OP); - /* set ADDR[7:0] */ - ret = rtl8366_smi_write_byte(smi, addr & 0xff); - if (ret) - goto out; + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* set ADDR[15:8] */ - ret = rtl8366_smi_write_byte(smi, addr >> 8); - if (ret) - goto out; + /* Write address to register 23 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_ADDRESS_REG, addr); - /* write DATA[7:0] */ - ret = rtl8366_smi_write_byte(smi, data & 0xff); - if (ret) - goto out; + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); - /* write DATA[15:8] */ - if (ack) - ret = rtl8366_smi_write_byte(smi, data >> 8); - else - ret = rtl8366_smi_write_byte_noack(smi, data >> 8); - if (ret) - goto out; + /* Write data to register 24 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_DATA_WRITE_REG, data); + + /* Write Start command to register 29 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_START_REG, MDC_MDIO_START_OP); + + /* Write data control code to register 21 */ + smi->mii_bus->write(smi->mii_bus, RTL_MDIO_PHYID, + MDC_MDIO_CTRL1_REG, MDC_MDIO_WRITE_OP); + + ret = 0; + } else { + rtl8366_smi_start(smi); + + /* send WRITE command */ + ret = rtl8366_smi_write_byte(smi, smi->cmd_write); + if (ret) + goto out; + + /* set ADDR[7:0] */ + ret = rtl8366_smi_write_byte(smi, addr & 0xff); + if (ret) + goto out; + + /* set ADDR[15:8] */ + ret = rtl8366_smi_write_byte(smi, addr >> 8); + if (ret) + goto out; + + /* write DATA[7:0] */ + ret = rtl8366_smi_write_byte(smi, data & 0xff); + if (ret) + goto out; + + /* write DATA[15:8] */ + if (ack) + ret = rtl8366_smi_write_byte(smi, data >> 8); + else + ret = rtl8366_smi_write_byte_noack(smi, data >> 8); + if (ret) + goto out; - ret = 0; + ret = 0; + +out: + rtl8366_smi_stop(smi); + } - out: - rtl8366_smi_stop(smi); spin_unlock_irqrestore(&smi->lock, flags); return ret; @@ -905,6 +981,24 @@ static inline void rtl8366_debugfs_remove(struct rtl8366_smi *smi) {} static int rtl8366_smi_mii_init(struct rtl8366_smi *smi) { int ret; + int i; + struct mii_bus *bus; + struct device_node *np; + + if (smi->mdio_enabled) { + np = of_parse_phandle(smi->parent->of_node, "mdio", 0); + + if (np) { + bus = of_mdio_find_bus(np); + + if (bus) { + smi->mii_bus = bus; + return 0; + } else + return -EPROBE_DEFER; + } else + return -ENODEV; + } smi->mii_bus = mdiobus_alloc(); if (smi->mii_bus == NULL) { @@ -943,8 +1037,10 @@ static int rtl8366_smi_mii_init(struct rtl8366_smi *smi) static void rtl8366_smi_mii_cleanup(struct rtl8366_smi *smi) { - mdiobus_unregister(smi->mii_bus); - mdiobus_free(smi->mii_bus); + if (!smi->mdio_enabled) { + mdiobus_unregister(smi->mii_bus); + mdiobus_free(smi->mii_bus); + } } int rtl8366_sw_reset_switch(struct switch_dev *dev) @@ -1232,21 +1328,23 @@ static int __rtl8366_smi_init(struct rtl8366_smi *smi, const char *name) { int err; - err = gpio_request(smi->gpio_sda, name); - if (err) { - printk(KERN_ERR "rtl8366_smi: gpio_request failed for %u, err=%d\n", - smi->gpio_sda, err); - goto err_out; - } + if (!smi->mdio_enabled) { + err = gpio_request(smi->gpio_sda, name); + if (err) { + printk(KERN_ERR "rtl8366_smi: gpio_request failed for %u, err=%d\n", + smi->gpio_sda, err); + goto err_out; + } - err = gpio_request(smi->gpio_sck, name); - if (err) { - printk(KERN_ERR "rtl8366_smi: gpio_request failed for %u, err=%d\n", - smi->gpio_sck, err); - goto err_free_sda; - } + err = gpio_request(smi->gpio_sck, name); + if (err) { + printk(KERN_ERR "rtl8366_smi: gpio_request failed for %u, err=%d\n", + smi->gpio_sck, err); + goto err_free_sda; + } - spin_lock_init(&smi->lock); + spin_lock_init(&smi->lock); + } /* start the switch */ if (smi->hw_reset) { @@ -1267,8 +1365,10 @@ static void __rtl8366_smi_cleanup(struct rtl8366_smi *smi) if (smi->hw_reset) smi->hw_reset(true); - gpio_free(smi->gpio_sck); - gpio_free(smi->gpio_sda); + if (!smi->mdio_enabled) { + gpio_free(smi->gpio_sck); + gpio_free(smi->gpio_sda); + } } enum rtl8366_type rtl8366_smi_detect(struct rtl8366_platform_data *pdata) @@ -1321,8 +1421,15 @@ int rtl8366_smi_init(struct rtl8366_smi *smi) if (err) goto err_out; - dev_info(smi->parent, "using GPIO pins %u (SDA) and %u (SCK)\n", - smi->gpio_sda, smi->gpio_sck); + err = rtl8366_smi_mii_init(smi); + if (err) + goto err_free_sck; + + if (smi->mdio_enabled) + dev_info(smi->parent, "using bus %s\n", smi->mii_bus->name); + else + dev_info(smi->parent, "using GPIO pins %u (SDA) and %u (SCK)\n", + smi->gpio_sda, smi->gpio_sck); err = smi->ops->detect(smi); if (err) { @@ -1351,10 +1458,6 @@ int rtl8366_smi_init(struct rtl8366_smi *smi) if (err) goto err_free_sck; - err = rtl8366_smi_mii_init(smi); - if (err) - goto err_free_sck; - rtl8366_debugfs_init(smi); return 0; @@ -1377,16 +1480,20 @@ EXPORT_SYMBOL_GPL(rtl8366_smi_cleanup); #ifdef CONFIG_OF int rtl8366_smi_probe_of(struct platform_device *pdev, struct rtl8366_smi *smi) { - int sck = of_get_named_gpio(pdev->dev.of_node, "gpio-sck", 0); - int sda = of_get_named_gpio(pdev->dev.of_node, "gpio-sda", 0); + smi->mdio_enabled = of_property_read_bool(pdev->dev.of_node, "mdio"); - if (!gpio_is_valid(sck) || !gpio_is_valid(sda)) { - dev_err(&pdev->dev, "gpios missing in devictree\n"); - return -EINVAL; - } + if (!smi->mdio_enabled) { + int sck = of_get_named_gpio(pdev->dev.of_node, "gpio-sck", 0); + int sda = of_get_named_gpio(pdev->dev.of_node, "gpio-sda", 0); + + if (!gpio_is_valid(sck) || !gpio_is_valid(sda)) { + dev_err(&pdev->dev, "gpios missing in devictree\n"); + return -EINVAL; + } - smi->gpio_sda = sda; - smi->gpio_sck = sck; + smi->gpio_sda = sda; + smi->gpio_sck = sck; + } return 0; } @@ -1406,6 +1513,7 @@ int rtl8366_smi_probe_plat(struct platform_device *pdev, struct rtl8366_smi *smi return -EINVAL; } + smi->mdio_enabled = false; smi->gpio_sda = pdata->gpio_sda; smi->gpio_sck = pdata->gpio_sck; smi->hw_reset = pdata->hw_reset; diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h index aede808b56b4..bbf619ad1c17 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h @@ -15,6 +15,19 @@ #include #include +#define RTL_MDIO_PHYID 0 +#define MDC_MDIO_CTRL0_REG 31 +#define MDC_MDIO_START_REG 29 +#define MDC_MDIO_CTRL1_REG 21 +#define MDC_MDIO_ADDRESS_REG 23 +#define MDC_MDIO_DATA_WRITE_REG 24 +#define MDC_MDIO_DATA_READ_REG 25 + +#define MDC_MDIO_START_OP 0xFFFF +#define MDC_MDIO_ADDR_OP 0x000E +#define MDC_MDIO_READ_OP 0x0001 +#define MDC_MDIO_WRITE_OP 0x0003 + #define RTL8366_SMI_ACK_RETRY_COUNT 5 #define RTL8366_SMI_HW_STOP_DELAY 25 /* msecs */ @@ -40,6 +53,7 @@ struct rtl8366_smi { struct device *parent; unsigned int gpio_sda; unsigned int gpio_sck; + bool mdio_enabled; void (*hw_reset)(bool active); unsigned int clk_delay; /* ns */ u8 cmd_read; From ed127bca17c39cda4fd164b01152e0f278d5f670 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 9 Feb 2017 23:49:41 +0500 Subject: [PATCH 47/49] ramips: update ZyXEL Keenetic Viva devicetree Remove unneeded cpu port property, update external interface init according to mapped ports for RTL8267RB: ext port #1 = extif0 ext port #2 = extif1 Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/ramips/dts/kng_rc.dts | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/linux/ramips/dts/kng_rc.dts b/target/linux/ramips/dts/kng_rc.dts index 7cd4de3fb254..baaee3fd59f6 100644 --- a/target/linux/ramips/dts/kng_rc.dts +++ b/target/linux/ramips/dts/kng_rc.dts @@ -75,8 +75,7 @@ rtl8367rb { compatible = "realtek,rtl8367b"; - cpu_port = <7>; - realtek,extif2 = <1 0 1 1 1 1 1 1 2>; + realtek,extif1 = <1 0 1 1 1 1 1 1 2>; mdio = <&mdio0>; }; }; From 0e5a79dc343a0d281d65728e7de363144ae26465 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Thu, 16 Feb 2017 12:46:21 +0500 Subject: [PATCH 48/49] ramips: DIR-645 fix switch external port in devicetree According to external interface mapping extif1 on RTL8367RB becomes extif0. Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/ramips/dts/DIR-645.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/ramips/dts/DIR-645.dts b/target/linux/ramips/dts/DIR-645.dts index 9c8082ca2443..64f0de53ff15 100644 --- a/target/linux/ramips/dts/DIR-645.dts +++ b/target/linux/ramips/dts/DIR-645.dts @@ -12,7 +12,7 @@ compatible = "realtek,rtl8367b"; gpio-sda = <&gpio0 1 0>; gpio-sck = <&gpio0 2 0>; - realtek,extif1 = <1 0 1 1 1 1 1 1 2>; + realtek,extif0 = <1 0 1 1 1 1 1 1 2>; }; gpio-keys-polled { From fea5fadc59c8d39fbfaa00dbd5a3bc368ac9bee5 Mon Sep 17 00:00:00 2001 From: Vitaly Chekryzhev <13hakta@gmail.com> Date: Sun, 19 Feb 2017 20:22:38 +0500 Subject: [PATCH 49/49] generic: rtl8366_smi: debug Signed-off-by: Vitaly Chekryzhev <13hakta@gmail.com> --- target/linux/generic/files/drivers/net/phy/rtl8366_smi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c index e19f43898954..463fa3df41dc 100644 --- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c +++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c @@ -534,9 +534,12 @@ static int rtl8366_set_pvid(struct rtl8366_smi *smi, unsigned port, if (!used) { /* Update the entry from the 4K table */ + dev_info(smi->parent, "get VLAN 4K vid:%d\n", vid); err = smi->ops->get_vlan_4k(smi, vid, &vlan4k); - if (err) + if (err) { + dev_err(smi->parent, "PVID #%d vid:%d\n", err, vid); return err; + } vlanmc.vid = vid; vlanmc.member = vlan4k.member;